Notes: Should add note that RCX-RARA passes VD0-11, ignores VD12-15 68 pin connector is: AMP 787169-7 Print using a monospace font. ############################################################################## EDT RCX Fiber Optic Cable Extender for Digital Cameras Revision: 00_x4 Jan 1, 2005 Control Information Document Owner: Jerry Gaffke Information Label: EDT Public File Location: ~hardware/tlkrci/doc Document Number: 008-01994-00_x4 Changes between rev 00x3 and 00x4: Added notes on E and F option straps Noted that the PCI DV-FOX could grab simulated data via the fiber from the RCX Changes between rev 00x2 and 00x3: None Changes between rev 00x1 and 00x2: Converted tabs to spaces so drawing of board prints properly. Added section on RCX Health Status, including pins in connector pin out for POWER, PSTAT0+, PSTAT0-, PSTAT1+, PSTAT1-. Should still add section on specifications (environmental, etc) Changes between rev 00x0 and 00x1: Under signals, added paragraph describing how rev00 firmware of the RCX latches data on falling edge of clock. Under "Configuration Straps", added section on Protect/Normal Strap. CONTENTS Overview Electrical Signals Connector Pin out LED Indicators Configuration Straps References -OVERVIEW- Note: Revision 00 of the RCX firmware is limited to supporting the 12 bit Dalsa 1M30P camera at 40 MHz. It supports the 12 data bits, LV, FV, and PXCLK in from the camera at LVDS signal levels, plus two duplex RS232 serial ports. It does not support binning, because with binning the camera changes its pixel clock frequency. Digital cameras typically use differential signals at either LVDS or RS422 signal levels over copper wire to communicate image data and control information betwen the camera and an interface board (such as the EDT PCI DVa) installed in the user's computer. This method of connection limits the maximum length of the cable to a few meters, and precludes electrically isolating the camera from the computer. Two EDT RCX modules can serve as a fiber optic "extension cord" for the cable between the camera and computer. For most cameras and frame grabbers, the presence of the RCX modules will be completely transparent. No change need be made to the interface board or the software that uses it. All of the standard data, control, and status lines defined in the AIA camera specification are accomodated. Communication between the two RCX modules is carried out via a duplex fiber optic cable, assuring electrical isolation. The fiber optic link is limited to 300 meters when using the standard fiber optic tranceivers available with the RCX and 62.5 micron MMF fiber. Special extended range tranceivers are an option, allowing operation out to X kilometers when used with appropriate fiber. Pixel clock rates of up to 60 MHz are supported for up to 16 bits of video data. For 24 bits of video data, the clock rate may be as high as 44 MHz. Minimum clock rate is 6 MHz. Four connector pins to the camera are allocated for use as serial ports. These pins may support one duplex serial port using the same differential signaling method (LVDS or RS422) as the other signals of the interface. Alternately, two duplex serial ports using single wire RS232 signal levels may be implemented. -ELECTRICAL SIGNALS- The signals over the 68 pin interface to the camera or the frame grabber conform to one of the following three standards: Low Voltage Differential Signalling (LVDS), also called TIA/EIA 644 RS422 differential signalling (switching between +3.3V and ground) RS232 signalling (typically +8V to -8V, only for 2 serial ports) All differential signal pair drivers and receivers (RS422 and/or LVDS) have 100 ohm parallel terminators on the RCX board. By default, the board is stuffed such that all signals are LVDS. The RS422 option substitutes RS422 drivers/receivers for the LVDS parts. Options are available that mix some RS422 signals with some LVDS signals, to accomodate the requirements of certain cameras. (Not all permutations are possible, as there are multiple drivers/receivers per package.) Regardless of whether RS422 or LVDS signaling is used, the differential signal pairs used to implement the serial port on pins 22,56 and 23,57 of the 68 pin connector can be configured via straps to instead implement two serial ports using single ended RS232 signaling. See the "Connector Pin Out", and "Configuration Straps" sections below for further details. -CONNECTOR PIN OUT- 68 pin Camera/Frame-Grabber Connector RCX RCX AIA RCX RCX AIA Pin Signal Signal Pin Signal Signal 1 Ground Ground 35 Ground Ground 2 VD0 + MSB + 36 VD0 - MSB - 3 VD1 + MSB1 + 37 VD1 - MSB1 - 4 VD2 + MSB2 + 38 VD2 - MSB2 - 5 VD3 + MSB3 + 39 VD3 - MSB3 - 6 VD4 + MSB4 + 40 VD4 - MSB4 - 7 VD5 + MSB5 + 41 VD5 - MSB5 - 8 VD6 + MSB6 + 42 VD6 - MSB6 - 9 VD7 + MSB7 + 43 VD7 - MSB7 - 10 VD8 + MSB8 + 44 VD8 - MSB8 - 11 VD9 + MSB9 + 45 VD9 - MSB9 - 12 Spare7 + Ground 46 Spare7 - Ground 13 VD10 + MSB10 + 47 VD10 - MSB10 - 14 VD11 + MSB11 + 48 VD11 - MSB11 - 15 VD12 + MSB12 + 49 VD12 - MSB12 - 16 VD13 + MSB13 + 50 VD13 - MSB13 - 17 PSTAT1 + Not used 51 PSTAT1 - Not used 18 Spare18 + Not used 52 POWER (was Spare18-) 19 VD14 + MSB14 + 53 VD14 - MSB14 - 20 VD15 + MSB15 + 54 VD15 - MSB15 - 21 PSTAT0 + Reserved 55 PSTAT0 - Reserved 22 EDTIN0 Serial Ctrl Out + 56 EDTIN1 Serial Control Out - 23* EDTOUT0 Serial Ctrl In + 57* EDTOUT1 Serial Control In - 24 FLDID + Field ID + 58 FLDID - Field ID - 25 FRME + Frame Enable + 59 FRME - Frame Enable - 26 LINE + Line Enable + 60 LINE - Line Enable - 27 ID0 + Channel ID 0 + 61 ID0 - Channel ID 0 - 28 ID1 + Channel ID 1 + 62 ID1 - Channel ID 1 - 29 PSTRB + Pixel Strobe + 63 PSTRB - Pixel Strobe - 30* EXPOSE + Mode Control 0 + 64* EXPOSE - Mode Control 0 - 31* MC0 + Mode Control 1 + 65* MC0 - Mode Control 1 - 32* MC1 + Mode Control 2 + 66* MC1 - Mode Control 2 - 33* MC2 + Mode Control 3 + 67* MC2 - Mode Control 3 - 34 Ground Ground 68 Ground Ground Table 1, RCX Module for Single-Channel Grayscale Cameras The camera/frame-grabber interface connector is a 68 pin AMP connector, mates with cable connector AMP 749621-7, plus backshell 750752-1. Asterisk denotes out to camera. (Lifted from EDT_pinouts2.doc, adjusted serial names, added asterisks.) The above pin out shows dual RS232 signal level serial ports on pins 22,56 and 23,57. In this case pins 22,56 are always into the RCX module, pins 23,57 are always out of the RCX module. If differential signalling is selected, then EDTIN0,EDTIN1 are the +/- differential signals in from the camera, EDTOUT0,EDTOUT1 are the +/- signals out to the camera. Unlike the RS232 case, the direction of these pins flips when used on the frame grabber end, as do all other differential signals. Rev00 firmware uniformly assumes that the frame grabber latches data on the negative edge of the clock, to conform with what the Dalsa 1M30P does. This applies to the simulator as well (so it must cause data to transition on the rising edge of the clock) . Power Power is supplied to the unit via a Switchcraft 712A coaxial power jack wired to the board at the points labeled "G" and "P" in the drawing above, where G is ground and P is +24 VDC at 5 Watts max. Center pin of the coaxial connector is positive. A small 120-240 VAC 50-60 Hertz brick style power supply is provided with each RCX module. Fiber The fiber-optic tranceiver is the Infineon Small-Form-Factor 850nm V23818-K305-L17 or equilavent. (May optionally use the V23818-K305-L56 for industrial grade environmental specifications, or the xxxxxxxx for longer distance runs of fiber.) It is placed on the board in the location labeled "LC_FIBER", and accepts fiber optic cables using standard LC duplex connectors. -LED INDICATORS- The RCX has two LED's. The LED mounted under the fiber optic tranceiver flickers when the signal from the far end is not properly received. Loss of signal for even a single data word will result in the LED turning on for about 1/20'th of a second, so any error should result in a visible display. The other LED mounted nearby blinks at a constant rate to indicate that the board has powered up and configured itself properly. -CONFIGURATION STRAPS- Below is a rough representation of the RCX circuit board showing connectors and straps. Print using a monospace font. +---------------------------------------------------------------------+ | AMP FEDCBA | | AMP | | AMP P G | | AMP J N P | | AMP J | | AMP J | | AMP J | | AMP SD SD J | | AMP SD SD J | | AMP VC VC J | | AMP vc vc J | | AMP | | AMP VC VC | | AMP VC VC | | AMP | | AMP | | AMP | | AMP LC_FIBER | | AMP | | AMP | | AMP | +---------------------------------------------------------------------+ Option Straps Note: The following information applies to revision 00 of the RCX firmware, it may not apply to future revisions. The six 2 pin straps labeled "FEDCBA" in the drawing above allow the user to configure the board in different ways. Normally, the end user need only be concerned about strap "A". Strap "A": Insert strap if this board is to be used on the frame grabber end, no strap if used on the camera end. Strap "B": Insert strap to enable the internal camera simulator. Strap "C": Insert strap to loop back the fiber optic interface. Strap "D": Insert strap to enable flash writes during firmware updates. Strap "E": Insert strap to select RS232 signal level receiver for UART, not the LVDS or RS422 signal level receivers. Strap "F": Insert strap to latch camera data on falling edge of the clock, not the rising edge. The simulator enabled by strap B generates a 1024 x 1024 image of binary count data, starting with 0x000 at the start of the frame. There are two configurations in which straps B and C may be useful to the end user during system debug: Debug Configuration using Remote Simulator With straps "A" and "B" inserted, the RCX generates fake camera data which it sends over the fiber optic link to a PCI DV-FOX. Alternately, the data can be sent over the fiber to a second RCX. The second RCX should be configured normally for the frame grabber end, with a single strap in position "A". Debug Configuration using Local Simulator With straps A, B, and C all inserted, the board operates as a stand alone camera simulator, generating image data at the 68 pin connector for a frame grabber to capture. No need for any fiber optic connection. When firmware updates to the board are required, this is carried out by cabling an EDT frame grabber (such as the PCI DVa) to the AMP 68 pin connector, inserting straps "A" and "D", then running the update software provided by EDT. (The EDT frame grabber sends signals to the RCX via the four mode-control lines defined by the AIA camera standard, and receives information back through the FV signal.) Serial Port Straps The four 3 pin straps labeled "SD" in the drawing above configure the serial ports. When all four straps are placed on the "S" side, then two RS232 serial ports are made available. When all four straps are placed on the "D" side, then one serial port using differential signaling is made available. DV/CD Mode Straps The eight 3 pin straps labeled "VC" and "vc' in the drawing above are used to configure the board to work with an EDT PCI DV frame grabber board, or the EDT PCI CD configurable DMA board. Only DV mode is supported at this time, so all "VC" straps should be on the "V" side. The "vc" straps touch on the signals used for PSTAT0 and PSTAT1, no straps should be stuffed into these two 3 pin headers. Protect/Normal Strap The 3 pin strap "PN" is normally left unstrapped, or with the strap in the "N" (Normal) keeper position. In this state, FPGA configuration code is read from the bottom of the serial flash ROM. When the strap is in the "P" position, FPGA configuration code is read from the protected sectors at the top of flash ROM. This provides a backup in case a firmware download to the bottom two sectors fails. (Most EDT designs place protected data in the bottom of the ROM, but this particular ROM makes it easier to protect the top few sectors.) With rev00 firmware, stuff loaded when the "PN" strap is in the "P" (protected) position is identical to that of the "N" position, except the LED's are switched. JTAG Connector The 8 pins marked by a column of "J" in the drawing above are used only when testing the board at the factory. Not covered in this section, but shown in the diagram are: Camera/Frame-Grabber Connector, marked by a column of "AMP". The wires to the 24 VDC coaxial power connector, marked by "G" and "P". The LC duplex fiber optic connector marked "LC_FIBER". RCX HEALTH STATUS Four pins on the RCX 68 pin connector are used for reporting RCX power-up status back to the host using LVDS differential signalling: pin 21: PSTAT0+ pin 55: PSTAT0- pin 17: PSTAT1+ pin 51: PSTAT1- Also, the two option strap pins 12 and 11 are driven with PSTAT0 and PSTAT1 respectively, at LVTTL signal levels. (Pin 1 has a square hole, pin 2 is opposite pin 1, pins 11 and 12 are at the far end of the 12 pin block labeled "OPTIONS" in the silk.) The information on PSTAT0 and PSTAT1 is encoded as follows: power_on: PSTAT1=1, PSTAT0=1 xilinx_up: PSTAT1=0, PSTAT0=1 link_ok: PSTAT1=1, PSTAT0=0 Any LVDS receiver on the host end will see 0,0 on PSTAT0 and PSTAT1 when the RCX is not powered up if these signals are biased as follows: pin 21: PSTAT0+ 1000 ohms to ground pin 55: PSTAT0- 1000 ohms to +2.5 volts pin 17: PSTAT1+ 1000 ohms to ground pin 51: PSTAT1- 1000 ohms to +2.5 volts Since this involves a power supply, the RCX cannot provide this when it is not powered up. However, the biasing could be done through a special cable assembly between the RCX and the frame grabber, or perhaps by just adding the 4 resistors to the frame grabber. The bottom of the resistor to the 2.5v supply will be at 1.3 volts, and should have about 1.2ma through it. If other than a 2.5v supply is available, scale the resistor appropriately. This supply should be between 3.0 and 5.5 volts. A resistor tolerance of 10% is sufficient. 2.5v: (2.5v - 1.3v)/.0012 = 1000 ohm 3.3v: (3.3v - 1.3v)/.0012 = 1666 ohm (use 1700) 5.0v: (5.0v - 1.3v)/.0012 = 3083 ohm (use 3000) The frame grabber should terminate the PSTAT0 and PSTAT1 LVDS differential pairs using 100 ohm parallel terminators. All other LVDS signal pairs are terminated with a 100 ohm resistor, as the RCX may be configured at either drive or receive these signal (when the RCX is used on the camera end or the frame grabber end). Signals PSTAT0 and PSTAT1 will always be outgoing for the RCX, so the 100 ohm resistors are removed to better allow the 1000 ohm resistors to properly bias the signals in the power-off case. Here is a discussion of the possible states for PSTAT1, PSTAT0. In all cases, an erroneous code may be caused by a faulty cable assembly, or a fault in the LVDS driver on the RCX responsible for PSTAT0, PSTAT1. power_off: PSTAT1=0, PSTAT0=0 The RCX connected directly to the frame grabber is either powered down, or the cable from the RCX to the frame grabber is not hooked up. power_on: PSTAT1=1, PSTAT0=1 The RCX connected directly to the frame grabber is powered up, but a hardware fault has been encountered that prevents the RCX from properly initializing. xilinx_up: PSTAT1=0, PSTAT0=1 The RCX connected directly to the frame grabber is powered up and the Xilinx has initialized, but an error free signal from the remote RCX is not being received. Possible causes are a fault in the optical fiber, no power to the remote RCX, or a hardware fault within the remote RCX. link_ok: PSTAT1=1, PSTAT0=0 Appears operational, the link over the fiber from the remote RCX is working. Note however that this gives no information about the link in the other direction, from the local RCX to the remote RCX. The state of this link may be tested by sending serial commands to the camera and to the smart controller. An alternate means of detecting the power-on state of the RCX is provided by signal POWER on pin 52 of the 68 pin connector, which is connected to the RCX 3.3 volt supply through a 100 ohm resistor. The PSTAT0, PSTAT1 signals would still be needed to differentiate between "power_on", "xilinx_up", and "link_ok" states. This feature may be removed in the future if deemed unnecessary. Note that the remote RCX on the camera end will also drive PSTAT0,PSTAT1 (and pins 11, 12 of the option straps) as described above. -REFERENCES- EDT PCI DVa Camera Interface AIA Digital Camera Interface Specification EIA 644 Specification (for LVDS signaling) RS422 Specification RS232 Specification