Functions | ||||
| int | edt_ocm_demux_chan_enable (EdtDev *edt_p, int channel, int enable) | |||
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| int | edt_ocm_demux_get (EdtDev *edt_p, EdtLineRate line_rate, u_char *onoff) | |||
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| int | edt_ocm_demux_get_chan_enabled (EdtDev *edt_p, int channel) | |||
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| int | edt_ocm_demux_set (EdtDev *edt_p, EdtLineRate line_rate, u_char *onoff) | |||
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| int | edt_ocm_has_mezz_bitfile (EdtDev *edt_p, char *bitfile_name) | |||
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| int | edt_ocm_load_default_mezzanine (EdtDev *edt_p, EdtLineRate line_rate, char *mezz_0, char *mezz_1) | |||
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| int | edt_ocm_lock_clocks (EdtDev *edt_p, int timeout) | |||
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| char * | edt_ocm_mezz_filename (EdtDev *edt_p, EdtLineRate line_rate) | |||
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| int | edt_ocm_set_clock_select (EdtDev *edt_p, EdtLineRate line_rate) | |||
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| int | edt_ocm_speed_capable (EdtDev *edt_p, EdtLineRate line_rate) | |||
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| int | edt_ocm_wait_for_frame (EdtDev *edt_p, int timeout) | |||
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| int edt_ocm_demux_chan_enable | ( | EdtDev * | edt_p, | |
| int | channel, | |||
| int | enable | |||
| ) |
| edt_p | pointer to device structure |
| channel | which channel to enable/disable | |
| enable | A value of 0 or 1 to indicate whether to enable this column in the input. 0 means off, 1 means enabled (this is the inverse of the actual bit state). |
| int edt_ocm_demux_get | ( | EdtDev * | edt_p, | |
| EdtLineRate | line_rate, | |||
| u_char * | onoff | |||
| ) |
| edt_p | pointer to device structure |
| line_rate | Line Rate constant - Currently must OC48_RATE or STM16_RATE | |
| onoff | An array of 0 or 1 to indicate whether column is active. (In the register the bits are actually the inverse of this.) The length of the array should be the equivalent OC number - 3 for OC3, 12 for OC12, etc. |
| int edt_ocm_demux_get_chan_enabled | ( | EdtDev * | edt_p, | |
| int | channel | |||
| ) |
| int edt_ocm_demux_set | ( | EdtDev * | edt_p, | |
| EdtLineRate | line_rate, | |||
| u_char * | onoff | |||
| ) |
| edt_p | pointer to device structure |
| line_rate | Line Rate constant | |
| onoff | An array of 0 or 1 to indicate whether column is active. (In the register the bits are actually the inverse of this.) The length of the array should correspond to the OC line rate - 12 for OC12, 48 for OC48, etc. (STM rates should be multiplied by 3). |
| int edt_ocm_has_mezz_bitfile | ( | EdtDev * | edt_p, | |
| char * | bitfile_name | |||
| ) |
| int edt_ocm_load_default_mezzanine | ( | EdtDev * | edt_p, | |
| EdtLineRate | line_rate, | |||
| char * | mezz_0, | |||
| char * | mezz_1 | |||
| ) |
| edt_p | pointer to device structure |
| line_rate | rate constant for the channel. If 0 use default | |
| mezz_0 | Optional alternate mezzanine bitfile names | |
| mezz_1 | Defaults to ocm48 and ocm12 |
| int edt_ocm_lock_clocks | ( | EdtDev * | edt_p, | |
| int | timeout | |||
| ) |
| char* edt_ocm_mezz_filename | ( | EdtDev * | edt_p, | |
| EdtLineRate | line_rate | |||
| ) |
| int edt_ocm_set_clock_select | ( | EdtDev * | edt_p, | |
| EdtLineRate | line_rate | |||
| ) |
| int edt_ocm_speed_capable | ( | EdtDev * | edt_p, | |
| EdtLineRate | line_rate | |||
| ) |
| int edt_ocm_wait_for_frame | ( | EdtDev * | edt_p, | |
| int | timeout | |||
| ) |
1.5.1