Definition in file libedt.h.
Go to the source code of this file.
Data Structures | |
| struct | edt_pll |
| struct | edt_dma_info |
| struct | _EdtMezzDescriptor |
| struct | Edt_embinfo |
| struct | Edt_prominfo |
| struct | edt_event_handler |
| struct | Edt_bdinfo |
| struct | EdtRingBuffer |
| struct | _dma_data_block |
| struct | _optionstr_fields |
| struct | _EdtBitfileDescriptor |
| struct | edt_device |
| struct | edt_ioctl_struct32 |
| struct | edt_ioctl_struct |
| struct | edt_buf |
| struct | ser_buf |
| struct | buf_args |
| struct | edt_merge_args |
| struct | p53b_test |
| struct | edt_sized_buffer |
Defines | |
| #define | event_t HANDLE |
| #define | USE_EVENT_HANDLERS |
| #define | EDT_MAX_KERNEL_EVENTS 20 |
| #define | EDT_BASE_EVENTS 1 |
| #define | EDT_EODMA_EVENT (EDT_BASE_EVENTS + 0) |
| #define | EDT_EODMA_EVENT_NAME "edt_eodma" |
| #define | EV_EODMA EDT_EODMA_EVENT |
| #define | EDT_EVENT_BUF (EDT_BASE_EVENTS + 1) |
| #define | EDT_BUF_EVENT_NAME "edt_buf" |
| #define | EDT_EVENT_STAT (EDT_BASE_EVENTS + 2) |
| #define | EDT_STAT_EVENT_NAME "edt_stat" |
| #define | EDT_EVENT_P16D_DINT (EDT_BASE_EVENTS + 3) |
| #define | EDT_P16D_DINT_EVENT_NAME "edt_p16dint" |
| #define | EDT_EVENT_P11W_ATTN (EDT_BASE_EVENTS + 4) |
| #define | EDT_P11W_ATTN_EVENT_NAME "edt_p11wattn" |
| #define | EDT_EVENT_P11W_CNT (EDT_BASE_EVENTS + 5) |
| #define | EDT_P11W_CNT_EVENT_NAME "edt_cnt" |
| #define | EDT_PDV_EVENT_ACQUIRE (EDT_BASE_EVENTS + 6) |
| #define | EDT_EVENT_ACQUIRE EDT_PDV_EVENT_ACQUIRE |
| #define | EDT_PDV_ACQUIRE_EVENT_NAME "edt_acquire" |
| #define | EDT_EVENT_PCD_STAT1 (EDT_BASE_EVENTS + 7) |
| #define | EDT_EVENT_PCD_STAT1_NAME "edt_pcd_stat1" |
| #define | EDT_EVENT_PCD_STAT2 (EDT_BASE_EVENTS + 8) |
| #define | EDT_EVENT_PCD_STAT2_NAME "edt_pcd_stat2" |
| #define | EDT_EVENT_PCD_STAT3 (EDT_BASE_EVENTS + 9) |
| #define | EDT_EVENT_PCD_STAT3_NAME "edt_pcd_stat3" |
| #define | EDT_EVENT_PCD_STAT4 (EDT_BASE_EVENTS + 10) |
| #define | EDT_EVENT_PCD_STAT4_NAME "edt_pcd_stat4" |
| #define | EDT_PDV_STROBE_EVENT (EDT_BASE_EVENTS + 11) |
| #define | EDT_PDV_STROBE_EVENT_NAME "edt_pdv_strobe" |
| #define | EDT_EVENT_P53B_SRQ (EDT_BASE_EVENTS + 12) |
| #define | EDT_EVENT_P53B_SRQ_NAME "edt_p53b_srq" |
| #define | EDT_EVENT_P53B_INTERVAL (EDT_BASE_EVENTS + 13) |
| #define | EDT_EVENT_P53B_INTERVAL_NAME "edt_p53b_interval" |
| #define | EDT_EVENT_P53B_MODECODE (EDT_BASE_EVENTS + 14) |
| #define | EDT_EVENT_P53B_MODECODE_NAME "edt_p53b_modecode" |
| #define | EDT_EVENT_P53B_DONE (EDT_BASE_EVENTS + 15) |
| #define | EDT_EVENT_P53B_DONE_NAME "edt_p53b_done" |
| #define | EDT_PDV_EVENT_FVAL (EDT_BASE_EVENTS + 16) |
| #define | EDT_PDV_EVENT_FVAL_NAME "edt_pdv_fval" |
| #define | EDT_PDV_EVENT_TRIGINT (EDT_BASE_EVENTS + 17) |
| #define | EDT_PDV_EVENT_TRIGINT_NAME "edt_pdv_trigint" |
| #define | EDT_EVENT_TEMP (EDT_BASE_EVENTS + 18) |
| #define | EDT_EVENT_TEMP_NAME "edt_temp_intr" |
| #define | EDT_MAX_EVENT_TYPES (EDT_EVENT_TEMP + 1) |
| #define | EDT_EVENT_MODE_MASK 0xFF000000 |
| #define | EDT_EVENT_MODE_SHFT 24 |
| #define | EDT_EVENT_MODE_ONCE 0 |
| #define | EDT_EVENT_MODE_CONTINUOUS 1 |
| #define | EDT_EVENT_MODE_SERIALIZE 2 |
| #define | PROM_UNKN 0 |
| #define | AMD_4013E 1 |
| #define | AMD_4013XLA 2 |
| #define | AMD_4028XLA 3 |
| #define | AMD_XC2S150 4 |
| #define | AMD_XC2S200_4M 5 |
| #define | AMD_XC2S200_8M 6 |
| #define | AMD_XC2S100_8M 7 |
| #define | AMD_XC2S300E 8 |
| #define | SPI_XC3S1200E 9 |
| #define | AMD_XC5VLX30T 10 |
| #define | AMD_XC5VLX50T 11 |
| #define | AMD_EP2SGX30D 12 |
| #define | AMD_XC5VLX70T 13 |
| #define | EDT_READ 0 |
| #define | EDT_WRITE 1 |
| #define | TRUE 1 |
| #define | FALSE 0 |
| #define | EDT_USER_BUFS 0 |
| #define | EDT_COPY_KBUFS 1 |
| #define | EDT_MMAP_KBUFS 2 |
| #define | EDT_PERSISTENT_KBUFS 4 |
| #define | MAX_EXTENDED_WORDS 32 |
| #define | MAX_DMA_BUFFERS 1024 |
| #define | EDT_SS_TYPE 1 |
| #define | EDT_GS_TYPE 2 |
| #define | EDT_CD_TYPE 3 |
| #define | EDT_LX_TYPE 4 |
| #define | edt_set_eodma_sig(p, s) edt_set_eodma_int(p, s) |
| #define | EDTIO_V0 0 |
| #define | EIO_ACTION_MASK 0x000003ff |
| #define | EIO_SIZE_MASK 0x00fffc00 |
| #define | EIO_SET 0x02000000 |
| #define | EIO_GET 0x01000000 |
| #define | EIO_SET_MASK EIO_SET |
| #define | EIO_GET_MASK EIO_GET |
| #define | EIO_SIZE_SHIFT 10 |
| #define | EIO_TYPE_SHIFT 24 |
| #define | EIO_DECODE_ACTION(code) (code & EIO_ACTION_MASK) |
| #define | EIODA(code) EIO_DECODE_ACTION(code) |
| #define | EIO_DECODE_SIZE(code) ((code & EIO_SIZE_MASK) >> EIO_SIZE_SHIFT) |
| #define | EIO_DECODE_SET(code) ((code & EIO_SET_MASK) != 0) |
| #define | EIO_DECODE_GET(code) ((code & EIO_GET_MASK) != 0) |
| #define | EDT_SERBUF_SIZE 2048 |
| #define | EDT_SERBUF_OVRHD 16 |
| #define | EDT_SERIAL_WAITRESP 1 |
| #define | EDT_SERIAL_SAVERESP 2 |
| #define | SIZED_DATASIZE (EDT_DEPSIZE - sizeof(u_int)) |
| #define | EDT_DEVICE_TYPE 0x8000 |
| #define | EDT_MAKE_IOCTL(t, c) (uint_t)(c) |
| #define | EIOC(action, type, size) |
| #define | EDTS_DEBUG EIOC(10, EIO_SET, sizeof(uint_t)) |
| #define | EDTG_DEBUG EIOC(11, EIO_GET, sizeof(uint_t)) |
| #define | EDTS_INTFC EIOC(12, EIO_SET, sizeof(edt_buf)) |
| #define | EDTG_INTFC EIOC(13, EIO_GET|EIO_SET, sizeof(edt_buf)) |
| #define | EDTS_REG EIOC(14, EIO_SET, sizeof(edt_buf)) |
| #define | EDTG_REG EIOC(15, EIO_GET|EIO_SET, sizeof(edt_buf)) |
| #define | EDTS_FLASH EIOC(16, EIO_SET, sizeof(edt_buf)) |
| #define | EDTG_FLASH EIOC(17, EIO_GET|EIO_SET, sizeof(edt_buf)) |
| #define | EDTG_CHECKBF EIOC(18, EIO_GET|EIO_SET, sizeof(buf_args)) |
| #define | EDTS_PROG EIOC(19, EIO_SET, sizeof(uint_t)) |
| #define | EDTG_PROG EIOC(20, EIO_GET, sizeof(uint_t)) |
| #define | EDTS_PROG_READBACK EIOC(21, EIO_SET, sizeof(uint_t)) |
| #define | EDTG_PROG_READBACK EIOC(22, EIO_GET, sizeof(uint_t)) |
| #define | EDTS_HEIGHT EIOC(23, EIO_SET, sizeof(uint_t)) |
| #define | EDTG_HEIGHT EIOC(24, EIO_GET, sizeof(uint_t)) |
| #define | EDTS_DEPTH EIOC(25, EIO_SET, sizeof(uint_t)) |
| #define | EDTG_DEPTH EIOC(26, EIO_GET, sizeof(uint_t)) |
| #define | EDTS_TYPE EIOC(27, EIO_SET, sizeof(uint_t)) |
| #define | EDTG_TYPE EIOC(28, EIO_GET, sizeof(uint_t)) |
| #define | EDTS_SERIAL EIOC(29, EIO_SET, sizeof(uint_t)) |
| #define | EDTG_SERIAL EIOC(30, EIO_GET, sizeof(uint_t)) |
| #define | EDTS_DEPENDENT EIOC(31, EIO_SET, EDT_DEPSIZE) |
| #define | EDTG_DEPENDENT EIOC(32, EIO_GET, EDT_DEPSIZE) |
| #define | EDTG_DEVID EIOC(33, EIO_GET, sizeof(uint_t)) |
| #define | EDTS_RTIMEOUT EIOC(34, EIO_SET, sizeof(uint_t)) |
| #define | EDTS_WTIMEOUT EIOC(35, EIO_SET, sizeof(uint_t)) |
| #define | EDTG_BUFDONE EIOC(36, EIO_GET, sizeof(bufcnt_t)) |
| #define | EDTS_NUMBUFS EIOC(37, EIO_SET, sizeof(int)) |
| #define | EDTS_BUF EIOC(38, EIO_SET, sizeof(buf_args)) |
| #define | EDTS_STARTBUF EIOC(39, EIO_SET, sizeof(uint_t)) |
| #define | EDTS_WAITBUF EIOC(40, EIO_SET|EIO_GET, sizeof(uint_t)) |
| #define | EDTS_FREEBUF EIOC(41, EIO_SET, sizeof(uint_t)) |
| #define | EDTS_STOPBUF EIOC(42, EIO_SET, sizeof(uint_t)) |
| #define | EDTG_BYTECOUNT EIOC(44, EIO_GET, sizeof(uint_t)) |
| #define | EDTS_SETBUF EIOC(45, EIO_SET, sizeof(int)) |
| #define | EDTS_ABORT_DELAY EIOC(46, EIO_SET, sizeof(int)) |
| #define | EDTG_TIMEOUTS EIOC(47, EIO_GET, sizeof(int)) |
| #define | EDTG_TRACEBUF EIOC(48, EIO_GET, (EDT_TRACESIZE * sizeof(int))) |
| #define | EDTS_STARTDMA EIOC(49, EIO_SET, sizeof(edt_buf)) |
| #define | EDTS_ENDDMA EIOC(50, EIO_SET, sizeof(edt_buf)) |
| #define | EDTS_FOIUNIT EIOC(51, EIO_SET, sizeof(int)) |
| #define | EDTG_FOIUNIT EIOC(52, EIO_GET, sizeof(int)) |
| #define | EDTS_FOICOUNT EIOC(53, EIO_SET, sizeof(int)) |
| #define | EDTG_FOICOUNT EIOC(54, EIO_GET, sizeof(int)) |
| #define | EDTG_RTIMEOUT EIOC(55, EIO_GET, sizeof(uint_t)) |
| #define | EDTG_WTIMEOUT EIOC(56, EIO_GET, sizeof(uint_t)) |
| #define | EDTS_EODMA_SIG EIOC(57, EIO_SET, sizeof(uint_t)) |
| #define | EDTS_SERIALWAIT EIOC(58, EIO_SET|EIO_GET, sizeof(edt_buf)) |
| #define | EDTS_EVENT_SIG EIOC(59, EIO_SET, sizeof(edt_buf)) |
| #define | EDTG_OVERFLOW EIOC(60, EIO_GET, sizeof(u_int)) |
| #define | EDTS_AUTODIR EIOC(61, EIO_SET, sizeof(u_int)) |
| #define | EDTS_FIRSTFLUSH EIOC(62, EIO_SET, sizeof(u_int)) |
| #define | EDTG_CONFIG_COPY EIOC(63, EIO_GET|EIO_SET, sizeof(edt_buf)) |
| #define | EDTG_CONFIG EIOC(64, EIO_GET|EIO_SET, sizeof(edt_buf)) |
| #define | EDTS_CONFIG EIOC(65, EIO_SET, sizeof(edt_buf)) |
| #define | P53B_REGTEST EIOC(66, EIO_SET, sizeof(p53b_test)) |
| #define | EDTG_LONG EIOC(67, EIO_GET|EIO_SET, sizeof(edt_buf)) |
| #define | EDTS_LONG EIOC(68, EIO_SET, sizeof(edt_buf)) |
| #define | EDTG_SGTODO EIOC(69, EIO_GET, (EDT_TRACESIZE * 4)) |
| #define | EDTG_SGLIST EIOC(70, EIO_SET|EIO_GET, sizeof(buf_args)) |
| #define | EDTS_SGLIST EIOC(71, EIO_SET, sizeof(buf_args)) |
| #define | EDTG_SGINFO EIOC(72, EIO_SET|EIO_GET, sizeof(edt_buf)) |
| #define | EDTG_TIMECOUNT EIOC(73, EIO_GET, sizeof(uint_t)) |
| #define | EDTG_PADDR EIOC(74, EIO_GET, sizeof(uint_t)) |
| #define | EDTS_SYNC EIOC(75, EIO_SET, sizeof(uint_t)) |
| #define | EDTS_WAITN EIOC(76, EIO_SET, sizeof(uint_t)) |
| #define | EDTS_STARTACT EIOC(77, EIO_SET, sizeof(uint_t)) |
| #define | EDTS_ENDACT EIOC(78, EIO_SET, sizeof(uint_t)) |
| #define | EDTS_RESETCOUNT EIOC(79, EIO_SET, sizeof(uint_t)) |
| #define | EDTS_RESETSERIAL EIOC(80, EIO_SET, sizeof(uint_t)) |
| #define | EDTS_CLR_EVENT EIOC(81, EIO_SET, sizeof(uint_t)) |
| #define | EDTS_ADD_EVENT_FUNC EIOC(82, EIO_SET, sizeof(uint_t)) |
| #define | EDTS_DEL_EVENT_FUNC EIOC(83, EIO_SET, sizeof(uint_t)) |
| #define | EDTS_WAIT_EVENT_ONCE EIOC(84, EIO_SET, sizeof(uint_t)) |
| #define | EDTS_WAIT_EVENT EIOC(85, EIO_SET, sizeof(uint_t)) |
| #define | EDTS_CLEAR_WAIT_EVENT EIOC(86, EIO_SET, sizeof(uint_t)) |
| #define | EDTG_TMSTAMP EIOC(87, EIO_SET|EIO_GET, sizeof(uint_t) * 3) |
| #define | EDTS_TIMEOUT_ACTION EIOC(88, EIO_SET, sizeof(uint_t)) |
| #define | EDTG_TIMEOUT_GOODBITS EIOC(89, EIO_GET, sizeof(uint_t)) |
| #define | EDTS_BAUDBITS EIOC(90, EIO_SET, sizeof(uint_t)) |
| #define | EDTG_REFTIME EIOC(91, EIO_GET, sizeof(uint_t) * 2) |
| #define | EDTS_REFTIME EIOC(92, EIO_SET, sizeof(uint_t) * 2) |
| #define | EDTS_REG_OR EIOC(93, EIO_SET|EIO_GET, sizeof(edt_buf)) |
| #define | EDTS_REG_AND EIOC(94, EIO_SET|EIO_GET, sizeof(edt_buf)) |
| #define | EDTG_GOODBITS EIOC(95, EIO_GET, sizeof(uint_t)) |
| #define | EDTS_BURST_EN EIOC(96, EIO_SET, sizeof(uint_t)) |
| #define | EDTG_BURST_EN EIOC(97, EIO_GET, sizeof(uint_t)) |
| #define | EDTG_FIRSTFLUSH EIOC(98, EIO_GET, sizeof(u_int)) |
| #define | EDTS_ABORT_BP EIOC(99, EIO_SET, sizeof(uint_t)) |
| #define | EDTS_DMASYNC_FORDEV EIOC(100, EIO_SET, sizeof(uint_t) * 3) |
| #define | EDTS_DMASYNC_FORCPU EIOC(101, EIO_SET, sizeof(uint_t) * 3) |
| #define | EDTG_BUFBYTECOUNT EIOC(102, EIO_GET, sizeof(uint_t) * 2) |
| #define | EDTS_DOTIMEOUT EIOC(103, EIO_SET, sizeof(uint_t)) |
| #define | EDTS_REFTMSTAMP EIOC(104, EIO_SET, sizeof(uint_t)) |
| #define | EDTS_PDVCONT EIOC(105, EIO_SET, sizeof(uint_t)) |
| #define | EDTS_PDVDPATH EIOC(106, EIO_SET, sizeof(uint_t)) |
| #define | EDTS_RESET_EVENT_COUNTER EIOC(107, EIO_SET, sizeof(uint_t)) |
| #define | EDTS_DUMP_SGLIST EIOC(108, EIO_SET, sizeof(uint_t)) |
| #define | EDTG_TODO EIOC(109, EIO_GET, sizeof(u_int)) |
| #define | EDTS_RESUME EIOC(110, EIO_SET, sizeof(u_int)) |
| #define | EDTS_TIMETYPE EIOC(111, EIO_SET, sizeof(u_int)) |
| #define | EDTS_EVENT_HNDL EIOC(112, EIO_SET, sizeof(edt_buf)) |
| #define | EDTS_MAX_BUFFERS EIOC(113, EIO_SET, sizeof(u_int)) |
| #define | EDTG_MAX_BUFFERS EIOC(114, EIO_GET, sizeof(u_int)) |
| #define | EDTS_WRITE_PIO EIOC(115, EIO_SET, sizeof(edt_sized_buffer)) |
| #define | EDTS_PROG_XILINX EIOC(116, EIO_SET, sizeof(edt_sized_buffer)) |
| #define | EDTS_MAPMEM EIOC(117, EIO_GET | EIO_SET, sizeof(edt_buf)) |
| #define | EDTS_ETEC_ERASEBUF_INIT EIOC(118, EIO_SET, sizeof(uint_t) * 2) |
| #define | EDTS_ETEC_ERASEBUF EIOC(119, EIO_SET, sizeof(u_int)) |
| #define | EDTG_DRIVER_TYPE EIOC(120, EIO_GET, sizeof(u_int)) |
| #define | EDTS_DRIVER_TYPE EIOC(121, EIO_SET, sizeof(u_int)) |
| #define | EDTS_DRV_BUFFER EIOC(122, EIO_SET | EIO_GET, sizeof(u_int)) |
| #define | EDTS_ABORTINTR EIOC(123, EIO_SET, sizeof(u_int)) |
| #define | EDTS_CUSTOMER EIOC(124, EIO_SET, sizeof(u_int)) |
| #define | EDTS_ETEC_SET_IDLE EIOC(125, EIO_SET, sizeof(u_int) * 3) |
| #define | EDTS_SOLARIS_DMA_MODE EIOC(126, EIO_SET, sizeof(u_int)) |
| #define | EDTS_UMEM_LOCK EIOC(127, EIO_SET, sizeof(u_int)) |
| #define | EDTG_UMEM_LOCK EIOC(128, EIO_GET, sizeof(u_int)) |
| #define | EDTS_RCI_CHAN EIOC(129, EIO_SET, sizeof(edt_buf)) |
| #define | EDTG_RCI_CHAN EIOC(130, EIO_SET|EIO_GET, sizeof(edt_buf)) |
| #define | EDTS_BITPATH EIOC(140, EIO_SET, sizeof(edt_bitpath)) |
| #define | EDTG_BITPATH EIOC(141, EIO_GET, sizeof(edt_bitpath)) |
| #define | EDTG_VERSION EIOC(142, EIO_GET, sizeof(edt_version_string)) |
| #define | EDTG_BUILDID EIOC(143, EIO_GET, sizeof(edt_version_string)) |
| #define | EDTS_WAITCHAR EIOC(144, EIO_SET, sizeof(edt_buf)) |
| #define | EDTS_PDMA_MODE EIOC(145, EIO_SET, sizeof(u_int)) |
| #define | EDTG_MEMSIZE EIOC(146, EIO_GET, sizeof(u_int)) |
| #define | EDTS_DIRECTION EIOC(147, EIO_SET, sizeof(u_int)) |
| #define | EDTG_CLRCIFLAGS EIOC(148, EIO_GET, sizeof(u_int)) |
| #define | EDTS_CLRCIFLAGS EIOC(149, EIO_SET, sizeof(u_int)) |
| #define | EDTS_MERGEPARMS EIOC(150, EIO_SET, sizeof(edt_merge_args)) |
| #define | EDTS_ABORTDMA_ONINTR EIOC(151, EIO_SET, sizeof(u_int)) |
| #define | EDTS_FVAL_DONE EIOC(152, EIO_SET, sizeof(u_char)) |
| #define | EDTG_FVAL_DONE EIOC(153, EIO_GET, sizeof(u_char)) |
| #define | EDTG_LINES_XFERRED EIOC(154, EIO_SET|EIO_GET, sizeof(u_int)) |
| #define | EDTS_PROCESS_ISR EIOC(155, EIO_SET|EIO_GET, sizeof(u_int)) |
| #define | EDTS_CLEAR_DMAID EIOC(156, EIO_SET, sizeof(u_int)) |
| #define | EDTS_DRV_BUFFER_LEAD EIOC(157, EIO_SET | EIO_GET, sizeof(u_int)) |
| #define | EDTG_SERIAL_WRITE_AVAIL EIOC(158, EIO_GET, sizeof(u_int)) |
| #define | EDTS_USER_DMA_WAKEUP EIOC(159, EIO_SET, sizeof(u_int)) |
| #define | EDTG_USER_DMA_WAKEUP EIOC(160, EIO_GET, sizeof(u_int)) |
| #define | EDTG_WAIT_STATUS EIOC(161, EIO_GET, sizeof(u_int)) |
| #define | EDTS_WAIT_STATUS EIOC(162, EIO_GET, sizeof(u_int)) |
| #define | EDTS_TIMEOUT_OK EIOC(163, EIO_SET, sizeof(u_int)) |
| #define | EDTG_TIMEOUT_OK EIOC(164, EIO_GET, sizeof(u_int)) |
| #define | EDTS_MULTI_DONE EIOC(165, EIO_GET, sizeof(u_int)) |
| #define | EDTG_MULTI_DONE EIOC(166, EIO_GET, sizeof(u_int)) |
| #define | EDTS_TEST_LOCK_ON EIOC(167, EIO_SET, sizeof(u_int)) |
| #define | EDTG_FVAL_LOW EIOC(168, EIO_SET|EIO_GET, sizeof(u_int)) |
| #define | EDTS_BUF_MMAP EIOC(169, EIO_SET, sizeof(buf_args)) |
| #define | EDTS_MEZZ_BITPATH EIOC(170, EIO_SET, sizeof(edt_bitpath)) |
| #define | EDTG_MEZZ_BITPATH EIOC(171, EIO_GET, sizeof(edt_bitpath)) |
| #define | EDTG_DMA_INFO EIOC(172, EIO_GET, sizeof(edt_dma_info)) |
| #define | EDTS_USER_FUNC EIOC(173, EIO_SET | EIO_GET, sizeof(edt_sized_buffer)) |
| #define | EDTS_TEST_STATUS EIOC(174, EIO_SET | EIO_GET, sizeof(u_int)) |
| #define | EDTS_KERNEL_ALLOC EIOC(175, EIO_SET | EIO_GET, sizeof(u_int)) |
| #define | EDTG_RESERVED_PAGES EIOC(176, EIO_GET, sizeof(u_int)) |
| #define | EDTS_RAW_SGLIST EIOC(177, EIO_SET, sizeof(buf_args)) |
| #define | EDTS_IGNORE_SIGNALS EIOC(178, EIO_SET, sizeof(u_int)) |
| #define | EDTS_TRACE_REG EIOC(179, EIO_SET, sizeof(u_int)) |
| #define | EDTS_TIMESTAMP_LEVEL EIOC(180, EIO_SET, sizeof(u_int)) |
| #define | EDTS_REG_BIT_CLEARSET EIOC(181, EIO_SET, sizeof(edt_buf)) |
| #define | EDTS_REG_BIT_SETCLEAR EIOC(182, EIO_SET, sizeof(edt_buf)) |
| #define | EDTS_REG_READBACK EIOC(183, EIO_SET, sizeof(u_int)) |
| #define | EDTS_MEZZ_ID EIOC(184, EIO_SET, sizeof(edt_buf)) |
| #define | EDTG_MEZZ_ID EIOC(185, EIO_SET|EIO_GET, sizeof(edt_buf)) |
| #define | EDTG_NUMBUFS EIOC(186, EIO_GET, sizeof(int)) |
| #define | EDTS_READ_STARTACT EIOC(187, EIO_SET, sizeof(edt_buf)) |
| #define | EDTS_READ_ENDACT EIOC(188, EIO_SET, sizeof(edt_buf)) |
| #define | EDTS_WRITE_STARTACT EIOC(189, EIO_SET, sizeof(edt_buf)) |
| #define | EDTS_WRITE_ENDACT EIOC(190, EIO_SET, sizeof(edt_buf)) |
| #define | EDTS_READ_START_DELAYS EIOC(191, EIO_SET, sizeof(u_int)) |
| #define | EDTS_READ_END_DELAYS EIOC(192, EIO_SET, sizeof(u_int)) |
| #define | EDTS_WRITE_START_DELAYS EIOC(193, EIO_SET, sizeof(u_int)) |
| #define | EDTS_WRITE_END_DELAYS EIOC(194, EIO_SET, sizeof(u_int)) |
| #define | EDTS_INDIRECT_REG_BASE EIOC(195, EIO_SET, sizeof(u_int)) |
| #define | EDTG_INDIRECT_REG_BASE EIOC(196, EIO_GET, sizeof(u_int)) |
| #define | EDTS_BITLOAD EIOC(197, EIO_SET|EIO_GET, sizeof(buf_args)) |
| #define | EDTS_MEZZLOAD EIOC(198, EIO_SET|EIO_GET, sizeof(buf_args)) |
| #define | EDTS_PCILOAD EIOC(199, EIO_SET, sizeof(buf_args)) |
| #define | EDTS_INTR_MASK EIOC(210, EIO_SET, sizeof(u_int)) |
| #define | EDTG_INTR_MASK EIOC(211, EIO_GET, sizeof(u_int)) |
| #define | EDT_WAIT_OK 0 |
| #define | EDT_WAIT_TIMEOUT 1 |
| #define | EDT_WAIT_OK_TIMEOUT 2 |
| #define | EDT_WAIT_USER_WAKEUP 3 |
| #define | EDT_UNIX_DRIVER 0 |
| #define | EDT_NT_DRIVER 1 |
| #define | EDT_2K_DRIVER 2 |
| #define | EDT_WDM_DRIVER 3 |
| #define | EDT_TM_SEC_NSEC 0 |
| #define | EDT_TM_CLICKS 1 |
| #define | EDT_TM_COUNTER 2 |
| #define | EDT_TM_FREQ 3 |
| #define | EDT_TM_INTR 4 |
| #define | EDT_DMA_IDLE 0 |
| #define | EDT_DMA_ACTIVE 1 |
| #define | EDT_DMA_TIMEOUT 2 |
| #define | EDT_DMA_ABORTED 3 |
| #define | EDT_SGLIST_SIZE 1 |
| #define | EDT_SGLIST_VIRTUAL 2 |
| #define | EDT_SGLIST_PHYSICAL 3 |
| #define | EDT_SGTODO_SIZE 4 |
| #define | EDT_SGTODO_VIRTUAL 5 |
| #define | EDT_SGTODO_FIRST_SG 6 |
| #define | EDT_ACT_NEVER 0 |
| #define | EDT_ACT_ONCE 1 |
| #define | EDT_ACT_ALWAYS 2 |
| #define | EDT_ACT_ONELEFT 3 |
| #define | EDT_ACT_CYCLE 4 |
| #define | EDT_ACT_KBS 5 |
| #define | EDT_ACT_ALWAYS_WRITEONLY 6 |
| #define | EDT_TIMEOUT_NULL 0 |
| #define | EDT_TIMEOUT_BIT_STROBE 0x1 |
| #define | EMAPI(x) EDT_MAKE_IOCTL(EDT_DEVICE_TYPE,EIODA(x)) |
| #define | ES_DEBUG EMAPI(EDTS_DEBUG) |
| #define | EG_DEBUG EMAPI(EDTG_DEBUG) |
| #define | ES_INTFC EMAPI(EDTS_INTFC) |
| #define | EG_INTFC EMAPI(EDTG_INTFC) |
| #define | ES_REG EMAPI(EDTS_REG) |
| #define | EG_REG EMAPI(EDTG_REG) |
| #define | ES_FLASH EMAPI(EDTS_FLASH) |
| #define | EG_FLASH EMAPI(EDTG_FLASH) |
| #define | EG_CHECKBF EMAPI(EDTG_CHECKBF) |
| #define | ES_PROG EMAPI(EDTS_PROG) |
| #define | EG_PROG EMAPI(EDTG_PROG) |
| #define | ES_PROG_READBACK EMAPI(EDTS_PROG_READBACK) |
| #define | EG_PROG_READBACK EMAPI(EDTG_PROG_READBACK) |
| #define | ES_HEIGHT EMAPI(EDTS_HEIGHT) |
| #define | EG_HEIGHT EMAPI(EDTG_HEIGHT) |
| #define | ES_DEPTH EMAPI(EDTS_DEPTH) |
| #define | EG_DEPTH EMAPI(EDTG_DEPTH) |
| #define | ES_TYPE EMAPI(EDTS_TYPE) |
| #define | EG_TYPE EMAPI(EDTG_TYPE) |
| #define | ES_SERIAL EMAPI(EDTS_SERIAL) |
| #define | EG_SERIAL EMAPI(EDTG_SERIAL) |
| #define | ES_DEPENDENT EMAPI(EDTS_DEPENDENT) |
| #define | EG_DEPENDENT EMAPI(EDTG_DEPENDENT) |
| #define | EG_DEVID EMAPI(EDTG_DEVID) |
| #define | ES_RTIMEOUT EMAPI(EDTS_RTIMEOUT) |
| #define | ES_WTIMEOUT EMAPI(EDTS_WTIMEOUT) |
| #define | EG_BUFDONE EMAPI(EDTG_BUFDONE) |
| #define | ES_NUMBUFS EMAPI(EDTS_NUMBUFS) |
| #define | ES_BUF EMAPI(EDTS_BUF) |
| #define | ES_BUF_MMAP EMAPI(EDTS_BUF_MMAP) |
| #define | ES_STARTBUF EMAPI(EDTS_STARTBUF) |
| #define | ES_WAITBUF EMAPI(EDTS_WAITBUF) |
| #define | ES_FREEBUF EMAPI(EDTS_FREEBUF) |
| #define | ES_STOPBUF EMAPI(EDTS_STOPBUF) |
| #define | EG_BYTECOUNT EMAPI(EDTG_BYTECOUNT) |
| #define | ES_SETBUF EMAPI(EDTS_SETBUF) |
| #define | ES_ABORT_DELAY EMAPI(EDTS_ABORT_DELAY) |
| #define | EG_TIMEOUTS EMAPI(EDTG_TIMEOUTS) |
| #define | EG_TRACEBUF EMAPI(EDTG_TRACEBUF) |
| #define | ES_STARTDMA EMAPI(EDTS_STARTDMA) |
| #define | ES_ENDDMA EMAPI(EDTS_ENDDMA) |
| #define | ES_FOIUNIT EMAPI(EDTS_FOIUNIT) |
| #define | EG_FOIUNIT EMAPI(EDTG_FOIUNIT) |
| #define | ES_FOICOUNT EMAPI(EDTS_FOICOUNT) |
| #define | EG_FOICOUNT EMAPI(EDTG_FOICOUNT) |
| #define | EG_RTIMEOUT EMAPI(EDTG_RTIMEOUT) |
| #define | EG_WTIMEOUT EMAPI(EDTG_WTIMEOUT) |
| #define | ES_EODMA_SIG EMAPI(EDTS_EODMA_SIG) |
| #define | ES_SERIALWAIT EMAPI(EDTS_SERIALWAIT) |
| #define | ES_EVENT_SIG EMAPI(EDTS_EVENT_SIG) |
| #define | EG_OVERFLOW EMAPI(EDTG_OVERFLOW) |
| #define | ES_AUTODIR EMAPI(EDTS_AUTODIR) |
| #define | ES_FIRSTFLUSH EMAPI(EDTS_FIRSTFLUSH) |
| #define | EG_FIRSTFLUSH EMAPI(EDTG_FIRSTFLUSH) |
| #define | EG_CONFIG_COPY EMAPI(EDTG_CONFIG_COPY) |
| #define | ES_CONFIG EMAPI(EDTS_CONFIG) |
| #define | EG_CONFIG EMAPI(EDTG_CONFIG) |
| #define | P_REGTEST EMAPI(P53B_REGTEST) |
| #define | ES_LONG EMAPI(EDTS_LONG) |
| #define | EG_LONG EMAPI(EDTG_LONG) |
| #define | EG_SGTODO EMAPI(EDTG_SGTODO) |
| #define | EG_SGLIST EMAPI(EDTG_SGLIST) |
| #define | ES_SGLIST EMAPI(EDTS_SGLIST) |
| #define | EG_SGINFO EMAPI(EDTG_SGINFO) |
| #define | EG_TIMECOUNT EMAPI(EDTG_TIMECOUNT) |
| #define | EG_PADDR EMAPI(EDTG_PADDR) |
| #define | ES_SYNC EMAPI(EDTS_SYNC) |
| #define | ES_WAITN EMAPI(EDTS_WAITN) |
| #define | ES_STARTACT EMAPI(EDTS_STARTACT) |
| #define | ES_ENDACT EMAPI(EDTS_ENDACT) |
| #define | ES_RESETCOUNT EMAPI(EDTS_RESETCOUNT) |
| #define | ES_RESETSERIAL EMAPI(EDTS_RESETSERIAL) |
| #define | ES_BAUDBITS EMAPI(EDTS_BAUDBITS) |
| #define | ES_CLR_EVENT EMAPI(EDTS_CLR_EVENT) |
| #define | ES_ADD_EVENT_FUNC EMAPI(EDTS_ADD_EVENT_FUNC) |
| #define | ES_DEL_EVENT_FUNC EMAPI(EDTS_DEL_EVENT_FUNC) |
| #define | ES_WAIT_EVENT_ONCE EMAPI(EDTS_WAIT_EVENT_ONCE) |
| #define | ES_WAIT_EVENT EMAPI(EDTS_WAIT_EVENT) |
| #define | EG_TMSTAMP EMAPI(EDTG_TMSTAMP) |
| #define | ES_CLEAR_WAIT_EVENT EMAPI(EDTS_CLEAR_WAIT_EVENT) |
| #define | ES_TIMEOUT_ACTION EMAPI(EDTS_TIMEOUT_ACTION) |
| #define | EG_TIMEOUT_GOODBITS EMAPI(EDTG_TIMEOUT_GOODBITS) |
| #define | EG_REFTIME EMAPI(EDTG_REFTIME) |
| #define | ES_REFTIME EMAPI(EDTS_REFTIME) |
| #define | ES_REG_OR EMAPI(EDTS_REG_OR) |
| #define | ES_REG_AND EMAPI(EDTS_REG_AND) |
| #define | EG_GOODBITS EMAPI(EDTG_GOODBITS) |
| #define | ES_BURST_EN EMAPI(EDTS_BURST_EN) |
| #define | EG_BURST_EN EMAPI(EDTG_BURST_EN) |
| #define | ES_ABORT_BP EMAPI(EDTS_ABORT_BP) |
| #define | ES_DOTIMEOUT EMAPI(EDTS_DOTIMEOUT) |
| #define | ES_REFTMSTAMP EMAPI(EDTS_REFTMSTAMP) |
| #define | ES_DMASYNC_FORDEV EMAPI(EDTS_DMASYNC_FORDEV) |
| #define | ES_DMASYNC_FORCPU EMAPI(EDTS_DMASYNC_FORCPU) |
| #define | EG_BUFBYTECOUNT EMAPI(EDTG_BUFBYTECOUNT) |
| #define | ES_PDVCONT EMAPI(EDTS_PDVCONT) |
| #define | ES_PDVDPATH EMAPI(EDTS_PDVDPATH) |
| #define | ES_RESET_EVENT_COUNTER EMAPI(EDTS_RESET_EVENT_COUNTER) |
| #define | ES_DUMP_SGLIST EMAPI(EDTS_DUMP_SGLIST) |
| #define | EG_TODO EMAPI(EDTG_TODO) |
| #define | ES_RESUME EMAPI(EDTS_RESUME) |
| #define | ES_TIMETYPE EMAPI(EDTS_TIMETYPE) |
| #define | ES_EVENT_HNDL EMAPI(EDTS_EVENT_HNDL) |
| #define | ES_MAX_BUFFERS EMAPI(EDTS_MAX_BUFFERS) |
| #define | EG_MAX_BUFFERS EMAPI(EDTG_MAX_BUFFERS) |
| #define | ES_WRITE_PIO EMAPI(EDTS_WRITE_PIO) |
| #define | ES_PROG_XILINX EMAPI(EDTS_PROG_XILINX) |
| #define | ES_MAPMEM EMAPI(EDTS_MAPMEM) |
| #define | ES_ETEC_ERASEBUF_INIT EMAPI(EDTS_ETEC_ERASEBUF_INIT) |
| #define | ES_ETEC_ERASEBUF EMAPI(EDTS_ETEC_ERASEBUF) |
| #define | EG_DRIVER_TYPE EMAPI(EDTG_DRIVER_TYPE) |
| #define | ES_DRIVER_TYPE EMAPI(EDTS_DRIVER_TYPE) |
| #define | ES_DRV_BUFFER EMAPI(EDTS_DRV_BUFFER) |
| #define | ES_ABORTINTR EMAPI(EDTS_ABORTINTR) |
| #define | ES_CUSTOMER EMAPI(EDTS_CUSTOMER) |
| #define | ES_ETEC_SET_IDLE EMAPI(EDTS_ETEC_SET_IDLE) |
| #define | ES_SOLARIS_DMA_MODE EMAPI(EDTS_SOLARIS_DMA_MODE) |
| #define | ES_UMEM_LOCK EMAPI(EDTS_UMEM_LOCK) |
| #define | EG_UMEM_LOCK EMAPI(EDTG_UMEM_LOCK) |
| #define | ES_RCI_CHAN EMAPI(EDTS_RCI_CHAN) |
| #define | EG_RCI_CHAN EMAPI(EDTG_RCI_CHAN) |
| #define | ES_BITPATH EMAPI(EDTS_BITPATH) |
| #define | EG_BITPATH EMAPI(EDTG_BITPATH) |
| #define | EG_VERSION EMAPI(EDTG_VERSION) |
| #define | EG_BUILDID EMAPI(EDTG_BUILDID) |
| #define | ES_WAITCHAR EMAPI(EDTS_WAITCHAR) |
| #define | ES_PDMA_MODE EMAPI(EDTS_PDMA_MODE) |
| #define | ES_DIRECTION EMAPI(EDTS_DIRECTION) |
| #define | EG_MEMSIZE EMAPI(EDTG_MEMSIZE) |
| #define | ES_CLRCIFLAGS EMAPI(EDTS_CLRCIFLAGS) |
| #define | EG_CLRCIFLAGS EMAPI(EDTG_CLRCIFLAGS) |
| #define | ES_MERGEPARMS EMAPI(EDTS_MERGEPARMS) |
| #define | ES_ABORTDMA_ONINTR EMAPI(EDTS_ABORTDMA_ONINTR) |
| #define | ES_FVAL_DONE EMAPI(EDTS_FVAL_DONE) |
| #define | EG_FVAL_DONE EMAPI(EDTG_FVAL_DONE) |
| #define | EG_LINES_XFERRED EMAPI(EDTG_LINES_XFERRED) |
| #define | ES_PROCESS_ISR EMAPI(EDTS_PROCESS_ISR) |
| #define | ES_CLEAR_DMAID EMAPI(EDTS_CLEAR_DMAID) |
| #define | ES_DRV_BUFFER_LEAD EMAPI(EDTS_DRV_BUFFER_LEAD) |
| #define | EG_SERIAL_WRITE_AVAIL EMAPI(EDTG_SERIAL_WRITE_AVAIL) |
| #define | ES_USER_DMA_WAKEUP EMAPI(EDTS_USER_DMA_WAKEUP) |
| #define | EG_USER_DMA_WAKEUP EMAPI(EDTG_USER_DMA_WAKEUP) |
| #define | EG_WAIT_STATUS EMAPI(EDTG_WAIT_STATUS) |
| #define | ES_WAIT_STATUS EMAPI(EDTS_WAIT_STATUS) |
| #define | ES_TIMEOUT_OK EMAPI(EDTS_TIMEOUT_OK) |
| #define | EG_TIMEOUT_OK EMAPI(EDTG_TIMEOUT_OK) |
| #define | ES_MULTI_DONE EMAPI(EDTS_MULTI_DONE) |
| #define | EG_MULTI_DONE EMAPI(EDTG_MULTI_DONE) |
| #define | ES_TEST_LOCK_ON EMAPI(EDTS_TEST_LOCK_ON) |
| #define | EG_FVAL_LOW EMAPI(EDTG_FVAL_LOW) |
| #define | ES_MEZZ_BITPATH EMAPI(EDTS_MEZZ_BITPATH) |
| #define | EG_MEZZ_BITPATH EMAPI(EDTG_MEZZ_BITPATH) |
| #define | EG_DMA_INFO EMAPI(EDTG_DMA_INFO) |
| #define | ES_USER_FUNC EMAPI(EDTS_USER_FUNC) |
| #define | ES_TEST_STATUS EMAPI(EDTS_TEST_STATUS) |
| #define | ES_KERNEL_ALLOC EMAPI(EDTS_KERNEL_ALLOC) |
| #define | EG_RESERVED_PAGES EMAPI(EDTG_RESERVED_PAGES) |
| #define | ES_RAW_SGLIST EMAPI(EDTS_RAW_SGLIST) |
| #define | ES_IGNORE_SIGNALS EMAPI(EDTS_IGNORE_SIGNALS) |
| #define | ES_TRACE_REG EMAPI(EDTS_TRACE_REG) |
| #define | ES_TIMESTAMP_LEVEL EMAPI(EDTS_TIMESTAMP_LEVEL) |
| #define | ES_REG_BIT_CLEARSET EMAPI(EDTS_REG_BIT_CLEARSET) |
| #define | ES_REG_BIT_SETCLEAR EMAPI(EDTS_REG_BIT_SETCLEAR) |
| #define | ES_REG_READBACK EMAPI(EDTS_REG_READBACK) |
| #define | ES_MEZZ_ID EMAPI(EDTS_MEZZ_ID) |
| #define | EG_MEZZ_ID EMAPI(EDTG_MEZZ_ID) |
| #define | EG_NUMBUFS EMAPI(EDTG_NUMBUFS) |
| #define | ES_READ_STARTACT EMAPI(EDTS_READ_STARTACT) |
| #define | ES_READ_ENDACT EMAPI(EDTS_READ_ENDACT) |
| #define | ES_WRITE_STARTACT EMAPI(EDTS_WRITE_STARTACT) |
| #define | ES_WRITE_ENDACT EMAPI(EDTS_WRITE_ENDACT) |
| #define | ES_READ_START_DELAYS EMAPI(EDTS_READ_START_DELAYS) |
| #define | ES_READ_END_DELAYS EMAPI(EDTS_READ_END_DELAYS) |
| #define | ES_WRITE_START_DELAYS EMAPI(EDTS_WRITE_START_DELAYS) |
| #define | ES_WRITE_END_DELAYS EMAPI(EDTS_WRITE_END_DELAYS) |
| #define | ES_INDIRECT_REG_BASE EMAPI(EDTS_INDIRECT_REG_BASE) |
| #define | EG_INDIRECT_REG_BASE EMAPI(EDTG_INDIRECT_REG_BASE) |
| #define | ES_BITLOAD EMAPI(EDTS_BITLOAD) |
| #define | ES_MEZZLOAD EMAPI(EDTS_MEZZLOAD) |
| #define | ES_PCILOAD EMAPI(EDTS_PCILOAD) |
| #define | ES_INTR_MASK EMAPI(EDTS_INTR_MASK) |
| #define | EG_INTR_MASK EMAPI(EDTG_INTR_MASK) |
| #define | MIN_PCI_IOCTL 200 |
| #define | PCIIOC(action, type, size) EIOC(action+MIN_PCI_IOCTL, type, size) |
| #define | PCD_STAT1_SIG 1 |
| #define | PCD_STAT2_SIG 2 |
| #define | PCD_STAT3_SIG 3 |
| #define | PCD_STAT4_SIG 4 |
| #define | PCD_STATX_SIG 5 |
| #define | P16_DINT_SIG 1 |
| #define | P11_ATT_SIG 1 |
| #define | P11_CNT_SIG 2 |
| #define | P53B_SRQ_SIG 1 |
| #define | P53B_INTERVAL_SIG 2 |
| #define | P53B_MODECODE_SIG 3 |
| #define | ID_IS_PCD(id) |
| #define | ID_IS_SS(id) |
| #define | ID_IS_GS(id) |
| #define | ID_IS_LX(id) |
| #define | ID_IS_PDV(id) |
| #define | ID_IS_DVFOX(id) |
| #define | ID_IS_DVCL(id) |
| #define | ID_IS_DVCL2(id) |
| #define | ID_HAS_MEZZ(id) (ID_IS_SS(id) || ID_IS_GS(id) || ID_IS_LX(id)) |
| #define | edt_is_pdv(edt_p) (ID_IS_PDV(edt_p->devid)) |
| #define | edt_is_pcd(edt_p) (ID_IS_PCD(edt_p->devid)) |
| #define | edt_is_dvfox(edt_p) (ID_IS_DVFOX(edt_p->devid)) |
| #define | edt_is_dvcl(edt_p) (ID_IS_DVCL(edt_p->devid)) |
| #define | edt_is_dvcl2(edt_p) (ID_IS_DVCL2(edt_p->devid)) |
| #define | edt_is_dv_multichannel(edt_p) (edt_is_dvcl(edt_p) || edt_is_dvfox(edt_p) || edt_p->devid == PDVAERO_ID) |
| #define | HDR_TYPE_IRIG1 1 |
| #define | HDR_TYPE_FRAMECNT 2 |
| #define | HDR_TYPE_IRIG2 3 |
| #define | HDR_TYPE_BUFHEADER 4 |
Typedefs | |
| typedef char | edt_version_string [128] |
| typedef u_int | bufcnt_t |
| typedef char | edt_bitpath [128] |
| typedef void(*) | EdtEventFunc (void *) |
| typedef int(*) | EdtBdFilterFunction (char *dev, int unit, int bd_id, void *data) |
Functions | |
| EdtDev * | edt_open (char *device_name, int unit) |
| Opens the specified EDT Product and sets up the device handle. | |
| EdtDev * | edt_open_quiet (char *device_name, int unit) |
| Just a version of edt_open that does so quietly, so we can try opening the device just to see if it's there without a lot of printfs coming out. | |
| EdtDev * | edt_open_channel (char *device_name, int unit, int channel) |
| Opens a specific DMA channel on the specified EDT Product, when multiple channels are supported by the Xilinx firmware, and sets up the device handle. | |
| int | edt_close (EdtDev *edt_p) |
| Shuts down all pending I/O operations, closes the device or channel and frees all driver resources associated with the device handle. | |
| int | edt_read (EdtDev *edt_p, void *buf, uint_t size) |
| Performs a read on the EDT Product. | |
| int | edt_write (EdtDev *edt_p, void *buf, uint_t size) |
| Perform a write on the EDT Product. | |
| int | edt_configure_ring_buffers (EdtDev *edt_p, int bufsize, int numbufs, int write_flag, unsigned char **bufarray) |
| Configures the EDT device ring buffers. | |
| int | edt_configure_block_buffers_mem (EdtDev *edt_p, int bufsize, int numbufs, int write_flag, int header_size, int header_before, u_char *user_mem) |
| Identical to edt_configure_block_buffers, with the additional parameter user_mem, which allows the user to specify a block of pre-allocated memory to use (Note: this does not work on Linux). | |
| int | edt_configure_block_buffers (EdtDev *edt_p, int bufsize, int numbufs, int write_flag, int header_size, int header_before) |
| Similar to edt_configure_ring_buffers, except that it allocates the ring buffers as a single large block, setting the ring buffer addresses from within that block. | |
| int | edt_disable_ring_buffers (EdtDev *edt_p) |
| Disables the EDT device ring buffers. | |
| int | edt_get_numbufs (EdtDev *edt_p) |
| edt_get_numbufs | |
| int | edt_reset_ring_buffers (EdtDev *edt_p, uint_t bufnum) |
| Stops any DMA currently in progress, then resets the ring buffer to start the next DMA at bufnum. | |
| int | edt_abort_dma (EdtDev *edt_p) |
| Stops any transfers currently in progress, resets the ring buffer pointers to restart on the current buffer. | |
| int | edt_abort_current_dma (EdtDev *edt_p) |
| Stops the current transfers, resets the ring buffer pointers to the next buffer. | |
| int | edt_stop_buffers (EdtDev *edt_p) |
| Stops DMA transfer after the current buffer has completed. | |
| int | edt_start_buffers (EdtDev *edt_p, uint_t count) |
| Starts DMA to the specified number of buffers. | |
| int | edt_set_buffer_size (EdtDev *edt_p, uint_t which_buf, uint_t size, uint_t write_flag) |
| Used to change the size or direction of one of the ring buffers. | |
| unsigned int | edt_allocated_size (EdtDev *edt_p, int bufnum) |
| Gets the allocated size of the specified buffer. | |
| int | edt_get_total_bufsize (EdtDev *edt_p, int bufsize, int header_size) |
| edt_get_total_bufsize | |
| unsigned char * | edt_wait_for_buffers (EdtDev *edt_p, int count) |
| Blocks until the specified number of buffers have completed. | |
| int | edt_ref_tmstamp (EdtDev *edt_p, u_int val) |
Causes application-defined events to show up in the same timeline as driver events when the event history is listed by running setdebug -g. | |
| int | edt_get_timestamp (EdtDev *edt_p, u_int *timep, u_int bufnum) |
| Gets the seconds and microseconds timestamp of when dma was completed on the buffer specified by bufnum. | |
| int | edt_get_reftime (EdtDev *edt_p, u_int *timep) |
| Gets the seconds and microseconds timestamp in the same format as the buffer_timed functions. | |
| unsigned char * | edt_wait_for_next_buffer (EdtDev *edt_p) |
| Waits for the next buffer that finishes DMA. | |
| unsigned char * | edt_last_buffer_timed (EdtDev *edt_p, u_int *timep) |
| Like edt_last_buffer but also returns the time at which the DMA was complete on this buffer. | |
| unsigned char * | edt_last_buffer (EdtDev *edt_p) |
| Waits for the last buffer that has been transferred. | |
| unsigned char * | edt_wait_buffers_timed (EdtDev *edt_p, int count, u_int *timep) |
| Blocks until the specified number of buffers have completed with a pointer to the time the last buffer finished. | |
| int | edt_set_buffer (EdtDev *edt_p, uint_t bufnum) |
| Sets which buffer should be started next. | |
| unsigned char * | edt_next_writebuf (EdtDev *edt_p) |
| Returns a pointer to the next buffer scheduled for output DMA, in order to fill the buffer with data. | |
| unsigned char ** | edt_buffer_addresses (EdtDev *edt_p) |
| Returns an array containing the addresses of the ring buffers. | |
| unsigned char * | edt_get_current_dma_buf (EdtDev *edt_p) |
| edt_current_dma_buf | |
| bufcnt_t | edt_done_count (EdtDev *edt_p) |
| Returns the cumulative count of completed buffer transfers in ring buffer mode. | |
| unsigned char * | edt_check_for_buffers (EdtDev *edt_p, uint_t count) |
| Checks whether the specified number of buffers have completed without blocking. | |
| uint_t | edt_get_bytecount (EdtDev *edt_p) |
| Returns the number of bytes read so far into the current buffer. | |
| void | edt_set_direction (EdtDev *edt_p, int direction) |
| On PCD cards, sets DMA direction to read or write. | |
| uint_t | edt_get_timeout_count (EdtDev *edt_p) |
| Returns the number of bytes transferred at last timeout. | |
| unsigned short | edt_get_direction (EdtDev *edt_p) |
| Gets the value of the PCD_DIRA and PCD_DIRB registers. | |
| void | edt_startdma_reg (EdtDev *edt_p, uint_t desc, uint_t val) |
| Sets the register and value to use at the start of dma, as set by edt_startdma_action. | |
| void | edt_enddma_reg (EdtDev *edt_p, uint_t desc, uint_t val) |
| Sets the register and value to use at the end of dma, as set by edt_enddma_action. | |
| void | edt_startdma_action (EdtDev *edt_p, uint_t val) |
| Specifies when to perform the action at the start of a dma transfer as specified by edt_startdma_reg. | |
| void | edt_enddma_action (EdtDev *edt_p, uint_t val) |
| Specifies when to perform the action at the end of a dma transfer as specified by edt_enddma_reg. | |
| void | edt_read_start_action (EdtDev *edt_p, u_int enable, u_int reg_desc, u_char set, u_char clear, u_char setclear, u_char clearset, int delay1, int delay2) |
| Enables an action where a specified register will be programmed with a specified value at the start of a dma read operation. | |
| void | edt_read_end_action (EdtDev *edt_p, u_int enable, u_int reg_desc, u_char set, u_char clear, u_char setclear, u_char clearset, int delay1, int delay2) |
| Enables an action where a specified register will be programmed with a specified value at the end of a dma read operation. | |
| void | edt_write_start_action (EdtDev *edt_p, u_int enable, u_int reg_desc, u_char set, u_char clear, u_char setclear, u_char clearset, int delay1, int delay2) |
| Enables an action where a specified register will be programmed with a specified value at the start of a dma write operation. | |
| void | edt_write_end_action (EdtDev *edt_p, u_int enable, u_int reg_desc, u_char set, u_char clear, u_char setclear, u_char clearset, int delay1, int delay2) |
| Enables an action where a specified register will be programmed with a specified value at the end of a dma write operation. | |
| int | edt_set_timeout_action (EdtDev *edt_p, u_int action) |
| Sets the driver behavior on a timeout. | |
| int | edt_get_timeout_goodbits (EdtDev *edt_p) |
| Returns the number of good bits in the last long word of a read buffer after the last timeout. | |
| int | edt_get_goodbits (EdtDev *edt_p) |
| Returns the current number of good bits in the last long word of a read buffer (0 through 31). | |
| int | edt_set_event_func (EdtDev *edt_p, int event_type, EdtEventFunc f, void *data, int continuous) |
| Defines a function to call when an event occurs. | |
| int | edt_remove_event_func (EdtDev *edt_p, int event_type) |
| Removes an event function previously set with edt_set_event_func. | |
| uint_t | edt_get_todo (EdtDev *edt_p) |
| Gets the number of buffers that the driver has been told to acquire. | |
| int | edt_ring_buffer_overrun (EdtDev *edt_p) |
| Returns true (1) when DMA has wrapped around the ring buffer and overwritten the buffer which the application is about to access. | |
| int | edt_configure_channel_ring_buffers (EdtDev *edt_p, int bufsize, int numbufs, int write_flag, unsigned char **bufarray) |
| int | edt_disable_ring_buffer (EdtDev *edt_p, int nIndex) |
| int | edt_cancel_current_dma (EdtDev *edt_p) |
| int | edt_user_dma_wakeup (EdtDev *edt_p) |
| int | edt_had_user_dma_wakeup (EdtDev *edt_p) |
| uint_t | edt_reg_read (EdtDev *edt_p, uint_t desc) |
| Reads the specified register and returns its value. | |
| void | edt_reg_write (EdtDev *edt_p, uint_t desc, uint_t val) |
| Write the specified value to the specified register. | |
| uint_t | edt_reg_or (EdtDev *edt_p, uint_t desc, uint_t val) |
| Performs a bitwise logical OR of the value of the specified register and the value provided in the argument; the result becomes the new value of the register. | |
| uint_t | edt_reg_and (EdtDev *edt_p, uint_t desc, uint_t val) |
| Performs a bitwise logical AND of the value of the specified register and the value provided in the argument; the result becomes the new value of the register. | |
| void | edt_reg_clearset (EdtDev *edt_p, uint_t desc, uint_t val) |
| Toggles the bits specified in the mask argument off then on in a single ioctl call. | |
| void | edt_reg_setclear (EdtDev *edt_p, uint_t desc, uint_t val) |
| Toggles the bits specified in the mask argument on then off in a single ioctl call. | |
| uchar_t | edt_intfc_read (EdtDev *edt_p, uint_t offset) |
| A convenience routine, partly for backward compatability, to access the user interface XILINX registers. | |
| void | edt_intfc_write_short (EdtDev *edt_p, uint_t offset, u_short val) |
| A convenience routine, partly for backward compatability, to access the user interface XILINX registers. | |
| u_short | edt_intfc_read_short (EdtDev *edt_p, uint_t offset) |
| A convenience routine, partly for backward compatability, to access the user interface XILINX registers. | |
| void | edt_intfc_write_32 (EdtDev *edt_p, uint_t offset, uint_t val) |
| A convenience routine, partly for backward compatability, to access the user interface XILINX registers. | |
| uint_t | edt_intfc_read_32 (EdtDev *edt_p, uint_t offset) |
| A convenience routine, partly for backward compatability, to access the user interface XILINX registers. | |
| void | edt_flush_fifo (EdtDev *edt_p) |
| Flushes the board's input and output FIFOs, to allow new data transfers to start from a known state. | |
| int | edt_set_firstflush (EdtDev *edt_p, int val) |
| Tells whether and when to flush the FIFOs before DMA transfer. | |
| int | edt_get_firstflush (EdtDev *edt_p) |
| OBSOLETE. | |
| int | edt_get_wait_status (EdtDev *edt_p) |
| int | edt_set_timeout_ok (EdtDev *edt_p, int val) |
| int | edt_get_timeout_ok (EdtDev *edt_p) |
| int | edt_set_eodma_int (EdtDev *edt_p, int sig) |
| int | edt_set_autodir (EdtDev *edt_p, int val) |
| int | edt_send_msg (EdtDev *edt_p, int unit, const char *msg, int size) |
| send a message | |
| int | edt_get_msg (EdtDev *edt_p, char *msgbuf, int maxsize) |
| Gets a message using the serial port of the current unit & channel. | |
| int | edt_get_msg_unit (EdtDev *edt_p, char *msgbuf, int maxsize, int unit) |
| int | edt_serial_wait (EdtDev *edt_p, int size, int timeout) |
| void | edt_init_mac8100 (EdtDev *edt_p) |
| int | edt_get_dependent (EdtDev *edt_p, void *addr) |
| int | edt_set_dependent (EdtDev *edt_p, void *addr) |
| int | edt_timeouts (EdtDev *edt_p) |
| Returns the number of read and write timeouts that have occurred since the last call of edt_open. | |
| void | edt_check_foi (EdtDev *edt_p) |
| void | edt_foi_autoconfig (EdtDev *edt_p) |
| int | edt_set_foiunit (EdtDev *edt_p, int unit) |
| int | edt_get_foiunit (EdtDev *edt_p) |
| int | edt_set_rci_dma (EdtDev *edt_p, int unit, int channel) |
| int | edt_get_rci_dma (EdtDev *edt_p, int unit) |
| int | edt_set_rci_chan (EdtDev *edt_p, int unit, int channel) |
| int | edt_get_rci_chan (EdtDev *edt_p, int unit) |
| void | edt_reset_counts (EdtDev *edt_p) |
| void | edt_reset_serial (EdtDev *edt_p) |
| int | edt_set_foicount (EdtDev *edt_p, int count) |
| int | edt_get_foicount (EdtDev *edt_p) |
| edt_get_foicount | |
| int | edt_set_debug (EdtDev *edt_p, int count) |
| int | edt_get_debug (EdtDev *edt_p) |
| int | edt_set_burst_enable (EdtDev *edt_p, int on) |
| Sets the burst enable flag, determining whether the DMA master transfers as many words as possible at once, or transfers them one at a time as soon as the data is acquired. | |
| int | edt_get_burst_enable (EdtDev *edt_p) |
| Returns the value of the burst enable flag, determining whether the DMA master transfers as many words as possible at once, or transfers them one at a time as soon as the data is acquired. | |
| int | edt_set_rtimeout (EdtDev *edt_p, int value) |
| Sets the number of milliseconds for data read calls, such as edt_read, to wait for DMA to complete before returning. | |
| int | edt_set_wtimeout (EdtDev *edt_p, int value) |
| Sets the number of milliseconds for data write calls, such as edt_write, to wait for DMA to complete before returning. | |
| int | edt_get_rtimeout (EdtDev *edt_p) |
| Gets the current read timeout value: the number of milliseconds to wait for DMA reads to complete before returning. | |
| int | edt_get_wtimeout (EdtDev *edt_p) |
| Gets the current write timeout value: the number of milliseconds to wait for DMA writes to complete before returning. | |
| void | edt_set_out_clk (EdtDev *edt_p, edt_pll *clk_data) |
| u_char | edt_set_funct_bit (EdtDev *edt_p, u_char mask) |
| u_char | edt_clr_funct_bit (EdtDev *edt_p, u_char mask) |
| u_char | edt_set_pllct_bit (EdtDev *edt_p, u_char mask) |
| u_char | edt_clr_pllct_bit (EdtDev *edt_p, u_char mask) |
| int | edt_set_ignore_signals (EdtDev *edt_p, int ignore) |
| int | edt_device_id (EdtDev *edt_p) |
| Gets the device ID of the specified device. | |
| char * | edt_idstr (int id) |
| Converts the board ID returned by edt_device_id to a human readable form. | |
| int | edt_parse_unit (const char *str, char *dev, const char *default_dev) |
| Parses an EDT device name string. | |
| int | edt_parse_unit_channel (const char *str, char *dev, const char *default_dev, int *channel) |
| parse -u argument returning the device and unit. | |
| int | edt_find_xpn (char *partnum, char *xilinx) |
| ` Reads file 'edt_parts.xpn', comparing entries with part number, returns matching xilinx in argument 'xilinx' if match is found. | |
| uint_t | edt_overflow (EdtDev *edt_p) |
| void | edt_perror (char *str) |
| Formats and prints a system error. | |
| u_int | edt_errno (void) |
| Returns an operating system-dependent error number. | |
| char * | edt_timestring (u_int *timep) |
| int | edt_system (const char *cmdstr) |
| Performs a UNIX-like system() call which passes the argument strings to a shell or command interpreter, then returns the exit status of the command or the shell so that errors can be detected. | |
| int | edt_parse_esn (char *str, Edt_embinfo *ei) |
| Parse the board's embedded information string. | |
| void | edt_get_sns (EdtDev *edt_p, char *esn, char *osn) |
| void | edt_get_sns_sector (EdtDev *edt_p, char *esn, char *osn, int sector) |
| Retrieve the board's manufacturer and OEM embedded information strings strings from the PCI xilinx information header. | |
| void | edt_get_osn (EdtDev *edt_p, char *osn) |
| Retrieve the board OEM's embedded information string from the PCI xilinx information header. | |
| void | edt_get_esn (EdtDev *edt_p, char *esn) |
| Retrieve the board's embedded information string from the PCI xilinx information header. | |
| int | edt_set_bitpath (EdtDev *edt_p, const char *bitpath) |
| Sets pathname to the currently loaded user interface bitfile in the driver. | |
| int | edt_get_bitpath (EdtDev *edt_p, char *bitpath, int size) |
| Obtains pathname to the currently loaded interface bitfile from the driver. | |
| int | edt_get_bitname (EdtDev *edt_p, char *bitpath, int size) |
| Obtains the name of the currently loaded interface bitfile from the driver. | |
| int | edt_set_mezz_chan_bitpath (EdtDev *edt_p, const char *bitpath, int channel) |
| Sets pathname to the currently loaded mezzanine bitfile in the driver. | |
| int | edt_get_mezz_chan_bitpath (EdtDev *edt_p, char *bitpath, int size, int channel) |
| Obtains pathname to the currently loaded mezzanine bitfile from the driver. | |
| int | edt_set_mezz_bitpath (EdtDev *edt_p, const char *bitpath) |
| Sets pathname to the currently loaded mezzanine bitfile in the driver. | |
| int | edt_get_mezz_bitpath (EdtDev *edt_p, char *bitpath, int size) |
| Obtains pathname to the currently loaded mezzanine bitfile from the driver. | |
| char * | edt_get_last_bitpath (EdtDev *edt_p) |
| u_int | edt_get_full_board_id (EdtDev *edt_p, int *extended_n, int *rev_id, u_int *extended_data) |
| Gets the mezzanine id including extended data. | |
| u_int | edt_get_board_id (EdtDev *edt_p) |
| Gets the mezzanine id. | |
| u_int | edt_set_mezz_id (EdtDev *edt_p) |
| u_int | edt_get_mezz_id (EdtDev *edt_p) |
| int | edt_get_driver_version (EdtDev *edt_p, char *versionstr, int size) |
| Gets the version of the EDT driver. | |
| int | edt_get_driver_buildid (EdtDev *edt_p, char *build, int size) |
| Gets the full build ID of the EDT library. | |
| int | edt_get_library_version (EdtDev *edt_p, char *versionstr, int size) |
| Gets the version (number and date) of the EDT library. | |
| int | edt_get_library_buildid (EdtDev *edt_p, char *build, int size) |
| Gets the full build ID of the EDT library. | |
| int | edt_check_version (EdtDev *edt_p) |
| compares version strings between library and driver, returns 0 if they aren't the same | |
| u_int | edt_get_dma_info (EdtDev *edt_p, edt_dma_info *dmainfo) |
| Gets information about active dma. | |
| int | edt_pci_reboot (EdtDev *edt_p) |
| reboot the PCI xilinx | |
| int | edt_set_merge (EdtDev *edt_p, u_int size, int span, u_int offset, u_int count) |
| set merge params | |
| void | edt_set_buffer_granularity (EdtDev *edt_p, u_int granularity) |
| u_int | edt_set_sgbuf (EdtDev *edt_p, u_int sgbuf, u_int bufsize, u_int bufdir, u_int verbose) |
| int | edt_lockoff (EdtDev *edt_p) |
| int | edt_enable_event (EdtDev *edt_p, int event_type) |
| int | edt_reset_event_counter (EdtDev *edt_p, int event_type) |
| Added 09/24/99 Mark. | |
| int | edt_wait_event (EdtDev *edt_p, int event_type, int timeoutval) |
| void | edt_dmasync_fordev (EdtDev *edt, int bufnum, int offset, int bytecount) |
| void | edt_dmasync_forcpu (EdtDev *edt, int bufnum, int offset, int bytecount) |
| u_int | edt_get_bufbytecount (EdtDev *edt_p, u_int *cur_buffer) |
| int | edt_little_endian (void) |
| int | edt_do_timeout (EdtDev *edt_p) |
| Causes the driver to perform the same actions as it would on a timeout (causing partially filled fifos to be flushed and dma to be aborted). | |
| int | edt_set_continuous (EdtDev *edt_p, int on) |
| void | edt_resume (EdtDev *edt_p) |
| void | edt_set_timetype (EdtDev *edt_p, u_int type) |
| caddr_t | edt_mapmem (EdtDev *edt_p, u_int addr, int size) |
| u_int | edt_get_mappable_size (EdtDev *edt_p) |
| u_int | edt_get_drivertype (EdtDev *edt_p) |
| int | edt_set_drivertype (EdtDev *edt_p, u_int type) |
| void | edt_set_abortintr (EdtDev *edt_p, u_int val) |
| int | edt_write_pio (EdtDev *edt_p, u_char *buf, int size) |
| int | edt_set_max_buffers (EdtDev *edt_p, int newmax) |
| Change the maximum number of ring buffers that can be allocated. | |
| int | edt_get_max_buffers (EdtDev *edt_p) |
| Get the maximum number of ring buffers that can be allocated. | |
| int | edt_set_kernel_buffers (EdtDev *edt_p, int onoff) |
| int | edt_get_kernel_buffers (EdtDev *edt_p) |
| int | edt_set_persistent_buffers (EdtDev *edt_p, int onoff) |
| int | edt_get_persistent_buffers (EdtDev *edt_p) |
| int | edt_set_mmap_buffers (EdtDev *edt_p, int onoff) |
| int | edt_get_mmap_buffers (EdtDev *edt_p) |
| void | edt_set_dump_reg_access (int on) |
| void | edt_x_byte_program (EdtDev *edt_p, u_int addr, u_char data, int isbt) |
| void | edt_x_block_program (EdtDev *edt_p, u_int addr, u_char *data, int nbytes, int xtype) |
| void | edt_x_verify (EdtDev *edt_p, u_int addr, u_char *data, int nbytes, int xtype) |
| void | edt_x_reset (EdtDev *edt_p, int isbt) |
| void | edt_x_print16 (EdtDev *edt_p, u_int addr, int xtype) |
| int | edt_x_prom_detect (EdtDev *edt_p, u_char *stat) |
| Edt_prominfo * | edt_get_prominfo (int promcode) |
| int | edt_get_max_promcode () |
| u_char | edt_x_read (EdtDev *edt_p, u_int addr, int xtype) |
| char * | edt_x_type_string (int xtype) |
| u_int | edt_get_id_addr (int promcode, int segment) |
| int | edt_program_xilinx (EdtDev *edt_p, const u_char *buf, int size, int do_sleep) |
| Program the interface xilinx. | |
| int | edt_get_x_file_header (const char *fname, char *header, int *size) |
| int | edt_x_get_fname (EdtDev *edt_p, char *name) |
| Extract the name of the on-board firmware in the device's FPGA PROM, minus the extension. | |
| int | edt_x_get_fname_auto (EdtDev *edt_p, char *name) |
| Extract the name of the on-board firmware in the device's FPGA PROM, minus the version and extension. | |
| int | edt_sector_erase (EdtDev *edt_p, u_int sector, u_int sec_size, int type) |
| void | edt_set_trace_regs (EdtDev *edt_p, u_int reg_def, u_int state) |
| Enable or disable tracing a single reg access. | |
| void | edt_trace_regs_enable (EdtDev *edt_p, u_int state) |
| int | edtdev_channels_from_type (EdtDev *edt_p) |
| edtdev_channels_from_type | |
| int | edt_check_1_vs_4 (EdtDev *edt_p) |
| Determines whether a board's PCI firmware is 4-channel or 1-channel. | |
| void | edt_set_intr_mask (EdtDev *edt_p, u_int state) |
| u_int | edt_get_intr_mask (EdtDev *edt_p) |
| void | edt_set_remote_intr (EdtDev *edt_p, u_int onoff) |
| u_int | edt_get_remote_intr (EdtDev *edt_p) |
| void | edt_set_do_fast (int val) |
| void | edt_set_force_slow (int val) |
| int | edt_get_do_fast (void) |
| int | edt_get_force_slow (void) |
| int | edt_get_debug_fast (void) |
| int | edt_set_debug_fast (int val) |
| u_char | edt_flipbits (u_char val) |
| int | edt_ioctl (EdtDev *, int code, void *arg) |
| edt_ioctl | |
| int | edt_ioctl_nt (EdtDev *edt_p, int controlCode, void *inBuffer, int inSize, void *outBuffer, int outSize, int *bytesReturned) |
| int edt_get_msg | ( | EdtDev * | edt_p, | |
| char * | msgbuf, | |||
| int | maxsize | |||
| ) |
Gets a message using the serial port of the current unit & channel.
If the number of bytes read is less than maxsize, msgbuf will be NULL terminated.
| edt_p | pointer to edt device structure returned by edt_open or edt_open_channel | |
| msgbuf | the buffer to store the message into | |
| maxsize | the maximum number of bytes to fill in. (Should not be greater than size of msgbuf. |
| int edt_get_foicount | ( | EdtDev * | edt_p | ) |
| int edt_pci_reboot | ( | EdtDev * | edt_p | ) |
| int edt_set_max_buffers | ( | EdtDev * | edt_p, | |
| int | newmax | |||
| ) |
Change the maximum number of ring buffers that can be allocated.
The default number of buffers differs depending on the EDT device being accessed, and is set to a conservative limit meant to ensure that too many system resources are not consumed. However, application and system architecture may indicate more buffers so this call is provided to up the number. The absolute maximum is 1024.
| edt_p | pointer to edt device structure returned by edt_open or edt_open_channel | |
| newmax | new maximum, up to 1024 |
| int edt_get_max_buffers | ( | EdtDev * | edt_p | ) |
Get the maximum number of ring buffers that can be allocated.
The default maximum number of ring buffers differs depending on the type of EDT device is in use; additionally the maximum can be changed by edt_set_max_buffers.
| edt_p | pointer to edt device structure returned by edt_open or edt_open_channel |
| int edt_program_xilinx | ( | EdtDev * | edt_p, | |
| const u_char * | buf, | |||
| int | size, | |||
| int | do_sleep | |||
| ) |
Program the interface xilinx.
Typically only called by edt_bitload.
| edt_p | pointer to edt device structure returned by edt_open | |
| buf | buffer containing the data to be loaded | |
| size | number of bytes to load from buffer add sleeps to slow it down in case of host speed issues |
Definition at line 1702 of file edt_bitload.c.
| int edt_x_get_fname | ( | EdtDev * | edt_p, | |
| char * | name | |||
| ) |
Extract the name of the on-board firmware in the device's FPGA PROM, minus the extension.
Fills in the name string field with the name of the device's onboard PROM, minus the voltage descriptor if any, and extension (.ncd). For devices with two voltage sectors to the firmware, two files with _3v.ncd and _5v.ncd extensions will be present; in such cases the _3v and _5v will be stripped off as well. For example if the device is loaded with "pcidev-10_3v.ncd" and "pcidev-10_5v.ncd", the subroutine will return "pcidev-10".
| edt_p | pointer to edt device structure returned by edt_open | |
| name | FPGA filename |
Definition at line 783 of file edt_xilinx.c.
| int edt_x_get_fname_auto | ( | EdtDev * | edt_p, | |
| char * | name | |||
| ) |
Extract the name of the on-board firmware in the device's FPGA PROM, minus the version and extension.
Fills in the name string field with the name of the device's onboard PROM, minus the version, voltage descriptor if any, and extension (.ncd). For devices with two voltage sectors to the firmware, two files with _3v.ncd and _5v.ncd extensions will be present; in such cases _3v and _5v will be stripped off as well. For example if the device is loaded with "pcidev-10_3v.ncd" and "pcidev-10_5v.ncd", the subroutine will return "pcidev".
| edt_p | pointer to edt device structure returned by edt_open | |
| name | FPGA filename |
Definition at line 837 of file edt_xilinx.c.
| void edt_set_trace_regs | ( | EdtDev * | edt_p, | |
| u_int | reg_def, | |||
| u_int | state | |||
| ) |
| int edtdev_channels_from_type | ( | EdtDev * | edt_p | ) |
| int edt_check_1_vs_4 | ( | EdtDev * | edt_p | ) |
Determines whether a board's PCI firmware is 4-channel or 1-channel.
| edt_p | pointer to device structure |
| int edt_ioctl | ( | EdtDev * | edt_p, | |
| int | code, | |||
| void * | arg | |||
| ) |
1.4.7