pdv_initcam.c

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#include "edtinc.h"

/* shorthand debug level */
#define INITCAM_MSG_ALWAYS EDT_MSG_FATAL
#define DEBUG1 PDVLIB_MSG_INFO_1
#define DEBUG2 PDVLIB_MSG_INFO_2


/*
 * static prototypes
 */
int     is_hex_byte_command(char *str);
void    check_terminator(char *str);
void    dir_from_path(char *dirstr, char *pathstr);
void    fname_from_path(char *fname, char *pathstr);
int     async_bitfile(EdtDev *edt_p);
char   *grepit(char *buf, char *pat);
int     is_hex_byte_command(char *str);
int     findid(char *str, char *idstr);
char   *strip_crlf(char *str);
void    propeller_sleep(int n);
char   *search_for_bitfile(char *rbtfile, char *cfgfname, char *bitpath);
int     serial_init(EdtDev * edt_p, Dependent * dd_p);
int     serial_init_basler_binary(EdtDev * edt_p, Dependent * dd_p);
int     serial_init_duncan_binary(EdtDev * edt_p, Dependent * dd_p);
int     send_xilinx_commands(EdtDev * edt_p, char *str);
int     send_foi_commands(EdtDev * edt_p, char *str);
int     check_roi(EdtDev * edt_p, Dependent * dd_p);
void    check_camera_values(EdtDev * ed, Dependent * dd_p);
int     kodak_query_serial(EdtDev * edt_p, char *cmd, int *val);
int     specinst_download(EdtDev * edt_p, char *fname);
int     specinst_setparams(EdtDev * edt_p, char *fname);
void    setup_cl2_simulator(EdtDev *edt_p, Dependent *dd_p);
int     check_register_wrap(EdtDev * edt_p);
char   *serial_tx_rx(PdvDev * pdv_p, char *command, int hexin);
void    do_xregwrites(EdtDev *edt_p, Dependent *dd_p);
int serial_init_binary(EdtDev * edt_p, Dependent * dd_p);
static int set_rci = 0;
static int rci_set_unit = 0;
static long    isascii_str(u_char * buf, int n);

void
pdv_initcam_set_rci(EdtDev * edt_p, int rci_unit)
{
    rci_set_unit = rci_unit;
    set_rci = 1;
}

/*
 * initcam internal function -- assumes dependent struct has already been loaded from
 * pdv_readcfg() or equivalent.
 */

int
pdv_channel_initialized(int unit, int channel)

{
        PdvDev *pdv_p;

        pdv_p = pdv_open_channel(EDT_INTERFACE,unit, channel);

        if (pdv_p && pdv_get_width(pdv_p) && pdv_get_height(pdv_p))
        {
                return 1;
        }

        return 0;
}

int
pdv_initcam(EdtDev * pdv_p, Dependent * dd_p, int unit, Edtinfo * edtinfo,
            char *cfgfname, char *bitdir, int pdv_debug)
{

    char errmsg[256];

    /* make sure the device is open and valid */
    if ((pdv_p == NULL) || (dd_p == NULL) || (pdv_p->fd == (HANDLE) NULL))
    {
        edt_msg(EDT_MSG_FATAL, "ERROR: invalid dependent struct pointer\n");
        return -1;
    }

#if 0 /* this doesn't work since is_dvcl2 includes PCIe8 and PCIe4 even if they're not configured as a simulator -- need a way to detect that!!! */
    if (edt_is_dvcl2(pdv_p))
    {
        edt_msg(EDT_MSG_FATAL, "ERROR: this is a simulator (output) board -- use clsimit to initialize\n");
        return -1;
    }
#endif

    /*
     * reality check on some critical input variables
     */
    if ((dd_p->camera_class[0] == '\0')
     || (dd_p->width == 0)
     || (dd_p->height == 0)
     || (dd_p->depth < 8)
     || (dd_p->depth > 32)
     || (dd_p->extdepth < 8)
     || (dd_p->extdepth > 32)
     || (dd_p->depth & 1)
     || (dd_p->extdepth & 1))
     {
        edt_msg(PDVLIB_MSG_WARNING, "WARNING: one or more critical config values appear invalid\n");
        sprintf(errmsg, "check readcfg/dependent struct and camera_class, width, height, depth, extdepth\n");
        edt_msg(DEBUG2, errmsg);
     }

    /*
     * pdv_p->dd_p is not necessarily used here, and is normally set by
     * pdv_open, but initcam is a special case
     */
    if (pdv_p->dd_p == 0) /* must've been opened with edt_open (or separately freed?) */
        pdv_p->dd_p = dd_p;
    else if (pdv_p->dd_p != dd_p)
        memcpy(pdv_p->dd_p, dd_p, sizeof(Dependent));

    /* IMPORTANT: use pdv_p->dd_p not just dd_p from here on out in this function */

    if (pdv_p->devid == PDVFOI_ID)
    {
#ifdef _FOI_SUPPORTED 
        pdv_initcam_checkfoi(pdv_p, edtinfo, unit);
#else
        edt_msg(EDT_MSG_FATAL, "FOI not supported beyond v4.1.5.9\n");
        return -1;
#endif
    }
    else
    {
        edt_reset_serial(pdv_p);

        if (pdv_p->dd_p->rbtfile[0])
        {
            if (edt_is_dvcl(pdv_p))
            {
                edt_msg(DEBUG1, "DV C-Link, skipping xilinx load\n");
            }
            else if (strcmp(pdv_p->dd_p->rbtfile, "_SKIPPED_") == 0)
                edt_msg(INITCAM_MSG_ALWAYS, "skipping bitload\n");
            else if (edt_is_dvfox(pdv_p) && pdv_p->channel_no > 0)
            {
                edt_msg(DEBUG1, "DV FOX channel %d skipping bit load\n",
                        pdv_p->channel_no);

                if (!pdv_channel_initialized(pdv_p->unit_no,
                                                0))
                {
                    edt_msg(EDT_MSG_FATAL, "You must initialize channel 0 before initializing any other channels on the DV-FOX\n");
                }
            }
            else if (pdv_initcam_load_bitfile(pdv_p, pdv_p->dd_p, unit, bitdir, cfgfname))
                {
                    edt_msg(EDT_MSG_FATAL, "ERROR: Failed bitload\n");
                    return -1;
                }
        }
        else edt_msg(DEBUG1, "No bitfile specified, skipping xilinx load\n");
        if (pdv_initcam_reset_camera(pdv_p, pdv_p->dd_p, edtinfo))
        {
            edt_msg(EDT_MSG_FATAL, "ERROR: Failed camera reset\n");
            return -1;
        }
    }

    return 0;
}



Dependent *
pdv_alloc_dependent()
{
    int     dsize = sizeof(Dependent);

    /*
     * check dependent size, not over limit allocated for it
     */
    if (dsize > EDT_DEPSIZE)
    {
        edt_msg(EDT_MSG_FATAL, "libpdv internal error: bad dependent struct size (%d) s/b %d\n", dsize, EDT_DEPSIZE);
        return NULL;
    }

    return (Dependent *) calloc(EDT_DEPSIZE, 1);
}


#ifdef _FOI_SUPPORTED
/*
 * the fiber optic interface has special needs
 */
int
pdv_initcam_checkfoi(EdtDev * edt_p, Edtinfo * p_edtinfo, int unit)
{
    int     ncameras, camera;
    int     ret = 0;

    if (set_rci)
    {
        ncameras = edt_get_foicount(edt_p);
        edt_msg(DEBUG1, "sees %d cameras\n", ncameras);
        if (ncameras == 0)
        {
            edt_check_foi(edt_p);
        }
        edt_p->dd_p->serial_respcnt = 4;
        edt_set_foiunit(edt_p, rci_set_unit);
        edt_set_rci_dma(edt_p, rci_set_unit, edt_p->channel_no);
        ret = pdv_initcam_reset_camera(edt_p, edt_p->dd_p, p_edtinfo);
    }
    else
    {
        edt_set_foicount(edt_p, 0);     /* to force config */
        edt_check_foi(edt_p);
        edt_p->dd_p->serial_respcnt = 4;
        ncameras = edt_get_foicount(edt_p);

        for (camera = 0; (camera < ncameras) && ret == 0; camera++)
        {
            edt_msg(DEBUG1, "Initializing FOI Unit %d\n", camera);
            edt_set_foiunit(edt_p, camera);
            edt_set_rci_dma(edt_p, camera, edt_p->channel_no);
            ret = pdv_initcam_reset_camera(edt_p, edt_p->dd_p, p_edtinfo);
        }
    }
    return ret;
}
#endif


void
dep_wait(EdtDev * edt_p)
{
    if (edt_p->devid == PDVFOI_ID)
    {
#ifdef _FOI_SUPPORTED 
        char    dmy[256];
        int ret = pdv_serial_wait(edt_p, 200, 0);
        if (ret)
            pdv_serial_read(edt_p, dmy, ret);
#endif
    }

}

/*
 * isapromaddress -- must be XXXXX.mmmm-YYYYY.mmmmo, where
 * XXXXX and YYYYY are 5-digit (or more) hex addresses, and mmmm and nnnnn
 * are the respective sizes in decimal  to download
 */
int
get_prom_addrs(char *str, u_int *addr1, int *size1, u_int *addr2, int *size2)
{

    if (str == NULL)
        return 0;

    if (sscanf(str, "%x.%d-%x.%d", addr1, size1, addr2, size2) != 4)
    {
        *addr1 = 0;
        *addr2 = 0;
        *size1 = 0;
        *size2 = 0;
        return -1;
    }
    return 0;
}

int
pdv_initcam_load_bitfile(EdtDev * edt_p,
                         Dependent * dd_p,
                         int unit,
                         char *bitdir,
                         char *cfgfname)
{
    char    dir_arg[256];
    char    cfgdir[256];
    int     emb = 0;
    int     ret, flags=0;
    u_char  *ba = NULL;
#ifdef NO_FS
    char bitname[128];
    int  len;
#endif

    cfgdir[0] = '\0';

    edt_msg(DEBUG2, "pdv_initcam_load_bitfile('%s')\n", dd_p->rbtfile);

    if (strcmp(bitdir, "_NOFS_") == 0)
    {
        emb = 1;
        flags = BITLOAD_FLAGS_NOFS;
    }


    if (edt_p->devid == PDVFOI_ID || edt_p->devid == DMY_ID)
    {
#if 0
        edt_flush_fifo(edt_p);
#endif
        dd_p->serial_respcnt = 4;
    }
    else
    {
        u_int addr1, addr2;
        int size1, size2;

        dd_p->serial_respcnt = 2;
        /*
         * if -b flag specified, send "-b dirname". if not, strip off leading
         * dir from filename and if that exists, send -d dirname otheriwise
         * just send "-d camera_config" and hope there's a
         * camera_config/bitfiles
         */

        if (get_prom_addrs(dd_p->rbtfile, &addr1, &size1, &addr2, &size2) == 0)
        {

            edt_msg(DEBUG1, "loading camera xilinx from PROM @ %x %d / %x %d", addr1, size1, addr2, size2);
            ret = edt_bitload_from_prom(edt_p, (u_char *)addr1, size1, (u_char *)addr2, size2, flags);
            printf("\n");
        }
        else
        {
    #ifdef NO_FS
            if (emb)
            {
                /* strip off .bit from name if nofs (embedded) xilinx */
                strcpy(bitname, dd_p->rbtfile);
                len = strlen(bitname);
                if ((len >= 4) && (strcasecmp(&bitname[len-4], ".bit") == 0))
                    bitname[len-4] = '\0';
                edt_msg(EDT_MSG_INFO_1, "loading embedded camera xilinx %s....\n", bitname);
                ret = edt_bitload(edt_p, bitdir, bitname, 1, 0);
                if (edt_is_dvfox(edt_p))
                    edt_msleep(500);
                edt_flush_fifo(edt_p);
                return ret;
            }
    #endif
            if (!emb)
            {
                if (*bitdir)
                    strcpy(dir_arg, bitdir);
                else
                {
                    dir_from_path(cfgdir, cfgfname);
                    sprintf(bitdir, "%s/bitfiles", cfgdir);

                    if ((!(*cfgdir)) || (pdv_access(bitdir, 0) != 0))
                        strcpy(cfgdir, "camera_config");

                    strcpy(dir_arg, cfgdir);
                }
            }

            edt_msg(DEBUG1, "loading camera xilinx %s....\n", dd_p->rbtfile);

            if ((ret = edt_bitload(edt_p, dir_arg, dd_p->rbtfile, 0, 0)) != 0)
                return ret;
        }

        if (edt_is_dvfox(edt_p))
            edt_msleep(500);

        edt_flush_fifo(edt_p);
    }

    return 0;
}



/*
 * setup registers on the board and send camera setup serial if indicated
 */
int
pdv_initcam_reset_camera(EdtDev * edt_p, Dependent * dd_p, Edtinfo * p_edtinfo)
{
    int     ret = 0;
    int     data_path = 0;

    if (edt_p->devid == PDVFOI_ID)
        edt_reset_serial(edt_p);

    if (dd_p->xilinx_rev == NOT_SET)
    {
        int     rev;

        edt_msg(DEBUG2, "checking for new rev xilinx\n");
        dep_wait(edt_p);
        edt_reg_write(edt_p, PDV_STAT, 0xff);
        rev = edt_reg_read(edt_p, PDV_REV);
        if (rev >= 1 && rev <= 32)
        {
            edt_msg(DEBUG2, "xilinx rev set to %d (0x%x)\n", rev, rev);
            dd_p->xilinx_rev = rev;
        }
        else
        {
            dd_p->xilinx_rev = 0;
            edt_msg(DEBUG2, "no xilinx rev from IOCTL, setting to 0\n");
        }

#ifdef NOT_DONE
        /* xilinx rev 2 we got option flag register */
        if ((dd_p->xilinx_rev >= 2) && (dd_p->xilinx_rev != 0xff))
            dd_p->xilinx_opt = edt_reg_read(edt_p, PDV_XILINX_OPT);
#endif
        dd_p->register_wrap = check_register_wrap(edt_p);

        /*
         * need to let the driver know the rev in dep_set/get since register
         * offsets changed in rev 2
         */
        edt_set_dependent(edt_p, dd_p);
    }

    /*
     * default baud is 9600; USED TO only set if explicitly in config
     * file, but why? on DVFOX that is a problem, and really no reason
     * not to (?), so jus' do it (as of 4.9.0.4.)
     */
    if (dd_p->serial_baud == NOT_SET)
        dd_p->serial_baud = 9600;
    pdv_set_baud(edt_p, dd_p->serial_baud);


    /*
     * infer dual channel from other flags
     */
    if (pdv_is_cameralink(edt_p)
     && (dd_p->cl_data_path & 0x10)
     && (!(dd_p->cl_cfg & PDV_CL_CFG_RGB)))
        dd_p->dual_channel = 1;

    if (!(edt_is_dvcl2(edt_p) && dd_p->sim_enable))
    {
        /*
         * set width/height.  Width and height as set in config file should be
         * actual camera width and height, before any ROI changes. ROI changes
         * will change dd_p->width/height but not dd_p->cam_width/height.
         */
        edt_msg(DEBUG1, "setting device defaults....\n");
        pdv_set_width(edt_p, dd_p->width);
        pdv_set_height(edt_p, dd_p->height);
        pdv_set_depth(edt_p, dd_p->depth);

        pdv_set_cam_width(edt_p, dd_p->width);
        pdv_set_cam_height(edt_p, dd_p->height);

        check_roi(edt_p, dd_p);

        if (dd_p->sim_enable) /* old simulator */
        {
            u_int   roictl;

            roictl = edt_reg_read(edt_p, PDV_ROICTL);
            /* default to simulated not from camera */
            if (!dd_p->sim_ctl)
                roictl |= (PDV_ROICTL_SIM_DAT | PDV_ROICTL_SIM_SYNC);
            else
                roictl |= dd_p->sim_ctl | PDV_ROICTL_SIM_DAT;
            edt_msg(DEBUG1, "setting simulator bits in roictl %x\n", roictl);
            edt_reg_write(edt_p, PDV_ROICTL, roictl);
        }
    }

    edt_set_dependent(edt_p, dd_p);

    edt_msg(DEBUG1, "setting registers....\n");
    if (edt_p->devid != PDVFOI_ID &&
        dd_p->genericsim)
    {
        edt_msg(DEBUG1, "setting up for simulator....\n");
        edt_reg_write(edt_p, SIM_LDELAY, dd_p->line_delay);
        edt_reg_write(edt_p, SIM_FDELAY, dd_p->frame_delay);
        edt_reg_write(edt_p, SIM_WIDTH, dd_p->sim_width - 1);
        edt_reg_write(edt_p, SIM_HEIGHT, dd_p->sim_height - 1);
        edt_reg_write(edt_p, SIM_CFG, dd_p->genericsim);


        edt_msg(DEBUG2, "SIM_CFG %x\n", dd_p->genericsim);
        switch (dd_p->sim_speed)
        {
        case 0:
            edt_msg(DEBUG2, "starting pixel clock at 5Mhz\n");
            edt_reg_write(edt_p, SIM_SPEED, 0);
            break;
        case 1:
            edt_msg(DEBUG2, "starting pixel clock at 10Mhz\n");
            edt_reg_write(edt_p, SIM_SPEED, 1);
            break;
        case 2:
            edt_msg(DEBUG2, "starting pixel clock at 20Mhz\n");
            edt_reg_write(edt_p, SIM_SPEED, 2);
            break;
        }
    }


    /* Configuration register settings (except CL2 simulator */
    if (!(edt_is_dvcl2(edt_p) && dd_p->sim_enable))
    {
        int     configuration = 0;

        if (dd_p->inv_shutter)
            configuration |= PDV_INV_SHUTTER;
        else
            configuration &= ~PDV_INV_SHUTTER;

        /*
         * if MODE_CNTL_NORM is not set, set default based on value
         * of camera_shutter timing
         */
        if (dd_p->mode_cntl_norm == NOT_SET)
        {
            if ((dd_p->camera_shutter_timing == AIA_MCL)
             || (dd_p->camera_shutter_timing == AIA_MCL_100US)
             || (dd_p->camera_shutter_timing == AIA_TRIG))
                dd_p->mode_cntl_norm = 0x10;
            else dd_p->mode_cntl_norm = 0;
        }

        /*
         * set default values for shutter_speed_min/max if using board shutter
         * timer and no min/max specified
         */
        if ((dd_p->camera_shutter_timing == AIA_MCL)
         || (dd_p->camera_shutter_timing == AIA_MCL_100US))
        {
            int exp;

            if ((dd_p->shutter_speed_min == 0) && (dd_p->shutter_speed_max == 0))
            {
                dd_p->shutter_speed_min = 0;
                dd_p->shutter_speed_max = 25500;
            }

            exp = pdv_get_exposure(edt_p);
            if (exp < dd_p->shutter_speed_min || exp > dd_p->shutter_speed_max)
                pdv_set_exposure(edt_p, dd_p->shutter_speed_min);
        }

        if (dd_p->camera_shutter_timing == AIA_SERIAL)
            dd_p->trig_pulse = 1;

        if (dd_p->trig_pulse || dd_p->camera_shutter_timing == AIA_SERIAL)
            configuration |= PDV_TRIG;
        else
            configuration &= ~PDV_TRIG;

        if (dd_p->dis_shutter)
            configuration |= PDV_DIS_SHUTTER;
        else
            configuration &= ~PDV_DIS_SHUTTER;

        if (dd_p->enable_dalsa)
            configuration |= PDV_EN_DALSA;
        else
            configuration &= ~PDV_EN_DALSA;

        edt_msg(DEBUG2, "CONFIG %x\n", configuration);
        dep_wait(edt_p);
        edt_reg_write(edt_p, PDV_CFG, configuration);
    }

    /* util3 register settings */
    {
        int     util3 = 0;

        if (dd_p->inv_ptrig)
            util3 |= PDV_LV_INVERT;
        else
            util3 &= ~PDV_LV_INVERT;

        if (dd_p->inv_fvalid)
            util3 |= PDV_FV_INVERT;
        else
            util3 &= ~PDV_FV_INVERT;

        /*
         * set dvfox mode16 automatically (ON if 8 bits single or dual channel
         * or 8-16 bits single channel, otherwise off), unless specifically set
         * in the config file
         */
        if (edt_is_dvfox(edt_p))
        {
            if (dd_p->mode16 == NOT_SET)
            {
                if ((!(dd_p->cl_cfg & PDV_CL_CFG_RGB))
                 && (((dd_p->cl_data_path & 0x0f) == 0x07)
                 || (dd_p->cl_data_path <= 0x0f)))
                    util3 |= PDV_MODE16;
            }
            else if (dd_p->mode16)
                util3 |= PDV_MODE16;
        }


        edt_msg(DEBUG2, "UTIL3 %x\n", util3);
        dep_wait(edt_p);

        edt_reg_write(edt_p, PDV_UTIL3, util3);
    }

    if (edt_p->devid != PDVFOI_ID)
        pdv_set_fval_done(edt_p, dd_p->fval_done);

        /* old initcam for irc was this */
    if (dd_p->camera_download == IRC_160)
    {
        int     tmp;

        edt_msg(DEBUG1, "doing old initcam method for IRC160");
#if 0
        tmp = edt_reg_read(edt_p, PDV_CFG);     /* inverse shutter, not
                                                 * trigger */
        tmp &= ~(PDV_INV_SHUTTER | PDV_TRIG);
#endif
        tmp = 0;
        if (dd_p->inv_shutter)
            tmp |= PDV_INV_SHUTTER;
        if (dd_p->camera_shutter_timing != AIA_MCL)
            tmp |= PDV_TRIG;
        dep_wait(edt_p);
        edt_reg_write(edt_p, PDV_CFG, tmp);
        edt_msg(DEBUG2, "CONFIG %x", tmp);
    }

    /* Data Path register settings (and camera link config/cntl) */
    if (pdv_is_cameralink(edt_p))
    {
        edt_msg(DEBUG2, "camera link cfg register %x\n", dd_p->cl_cfg);
        edt_reg_write(edt_p, PDV_CL_CFG, dd_p->cl_cfg);

        edt_msg(DEBUG2, "camera link cfg2 register %x\n", dd_p->cl_cfg2);
        edt_reg_write(edt_p, PDV_CL_CFG2, dd_p->cl_cfg2);

        edt_msg(DEBUG2, "camera link data_path register %x\n", dd_p->cl_data_path);
        edt_reg_write(edt_p, PDV_CL_DATA_PATH, dd_p->cl_data_path);

        if (dd_p->cl_hmax != 0x0)
        {
            edt_msg(DEBUG2, "camera link hmax register %x\n", dd_p->cl_hmax);
            edt_reg_write(edt_p, PDV_CL_HMAX, dd_p->cl_hmax);
        }

        if (dd_p->swinterlace == PDV_BGGR
                || dd_p->swinterlace == PDV_ILLUNIS_BGGR)
        {
                /* kludge for now */
        }
        else if (dd_p->depth > 8)
                data_path |= PDV_EXT_DEPTH;

        if (dd_p->camera_shutter_timing == AIA_MCL_100US)
                data_path |= PDV_MULTIPLIER_100US;

        if (dd_p->fv_once)
                data_path |= PDV_CONTINUOUS;

        if (dd_p->trigdiv)
            edt_reg_write(edt_p, PDV_TRIGDIV, dd_p->trigdiv);

        dep_wait(edt_p);
        edt_reg_write(edt_p, PDV_DATA_PATH, data_path);
        dd_p->datapath_reg = data_path;
        edt_set_dependent(edt_p, dd_p);
    }
    else
    {
        if (dd_p->camera_shutter_timing == DALSA_CONTINUOUS)
            dd_p->continuous = 1;
#if 0
        /* don't turn on until in driver */
        if (dd_p->continuous)
            data_path |= PDV_CONTINUOUS;
        else
            data_path &= ~PDV_CONTINUOUS;
#endif

        if (dd_p->fv_once)
                data_path |= PDV_CONTINUOUS;

        if (dd_p->interlace)
            data_path |= PDV_INTERLACED;
        else
            data_path &= ~PDV_INTERLACED;

        edt_msg(DEBUG2, "data_path register %x\n", data_path);

        /*
         * if async we set the board generated pixel clock speed in
         * roictl register (added async check so we can use pclock_speed
         * for auto timeout and other stuff 08/06 rwh)
         */
        if (async_bitfile(edt_p))
        {
            u_int bits = 0;
            u_int roictl = edt_reg_read(edt_p, PDV_ROICTL);

            if (dd_p->pclock_speed < 5)
                    dd_p->pclock_speed = 5;

            switch(dd_p->pclock_speed)
            {
                case 20: bits = 0x04; break;
                case 10: bits = 0x05; break;
                case 5: bits = 0x06; break;
                default: edt_msg(PDVLIB_MSG_WARNING, "invalid pclock_speed value for async\n");
            }

            if (bits)
                edt_reg_write(edt_p, PDV_ROICTL, roictl | bits);
                
        }
        else if (dd_p->pclock_speed < 1)
        {
            if (pdv_is_cameralink(edt_p))
                    dd_p->pclock_speed = 20;
            else dd_p->pclock_speed = 5;
        }

        if (dd_p->double_rate)
        {
            u_int   roictl = edt_reg_read(edt_p, PDV_ROICTL) | PDV_RIOCTL_PCLKSEL_DBL_CAM;

            edt_reg_write(edt_p, PDV_ROICTL,
                          roictl);

        }

        if (dd_p->camera_shutter_timing == PDV_DALSA_LS)
        {
            u_int   roictl = edt_reg_read(edt_p, PDV_ROICTL);

            roictl |= PDV_ROICTL_DALSA_LS;

            edt_reg_write(edt_p, PDV_ROICTL,
                          roictl);

        }

        /*
         * 'different' dual channel
         */
        if (dd_p->dual_channel)
        {
            edt_msg(DEBUG1, "setting dual channel\n");
            data_path &= ~PDV_RES0;
            data_path |= PDV_RES1;
#if 0                           /* wha...? this seems to BREAK Dalsa
                                 * (ca-d4-1024A anyway), so skip it! */
            if (dd_p->enable_dalsa)
            {
                if (dd_p->extdepth > 8)
                    data_path |= PDV_EXT_DEPTH;
            }
            else
#endif
                data_path |= PDV_EXT_DEPTH;
        }
        else if (dd_p->swinterlace == PDV_BGGR)
        {
            /* set for 10 bit ext - 8 bit first pass kludge */
            data_path |= PDV_RES0;
            data_path &= ~PDV_RES1;
        }
        else if (dd_p->swinterlace == PDV_BGGR_WORD
                 || dd_p->swinterlace == PDV_BGGR_DUAL)
        {
            /* set for 10 bit ext */
            data_path |= PDV_EXT_DEPTH;
            data_path |= PDV_RES0;
            data_path &= ~PDV_RES1;
        }
        else
        {
            if (dd_p->depth > 8)
                data_path |= PDV_EXT_DEPTH;
            switch (dd_p->extdepth)
            {
            case 8:
                data_path &= ~PDV_EXT_DEPTH;
                break;
            case 10:
                data_path |= PDV_RES0;
                data_path &= ~PDV_RES1;
                break;
            case 12:
                data_path &= ~PDV_RES0;
                data_path &= ~PDV_RES1;
                break;
            case 14:
                data_path |= PDV_RES0;
                data_path |= PDV_RES1;
                break;
            case 16:
                data_path &= ~PDV_RES0;
                data_path |= PDV_RES1;
                break;
            }
        }

        if (dd_p->camera_shutter_timing == AIA_MCL_100US)
            data_path |= PDV_MULTIPLIER_100US;

        edt_msg(DEBUG2, "DATA_PATH %x\n", data_path);
        dep_wait(edt_p);
        edt_reg_write(edt_p, PDV_DATA_PATH, data_path);
        dd_p->datapath_reg = data_path;
        edt_set_dependent(edt_p, dd_p);
    }

    /* new aia */
    if (dd_p->xilinx_rev >= 1 && dd_p->xilinx_rev <= 32)
    {
        int util2 = dd_p->util2;

        /*
         * set shift/mask (except n/a on cameralink)
         */
        if (!pdv_is_cameralink(edt_p))
        {
            if (dd_p->shift == NOT_SET)
            {
                int     tmpdepth;

                if (dd_p->depth == 24)
                    tmpdepth = 8;
                else
                    tmpdepth = dd_p->depth;

                /*
                 * shift gets a bit weird for DVC -- the DVK and DV44 cables are
                 * wired differently, and the older DVK is yet a third case --
                 * punt on that one and try to handle the first two as best we we
                 * can. Worst case will be that someone will need to use explicit
                 * shift in the in the config file if they have a specific cable.
                 */
                if (pdv_is_dvc(edt_p))
                {
                    edt_msg(DEBUG1, "auto-setting shift for dvc\n");

                    if (edt_p->devid == PDV44_ID)
                        dd_p->shift = (16 - dd_p->extdepth) | PDV_AIA_SWAP;
                    else if (dd_p->extdepth == 12)      /* dvk 12-bit cable */
                    {
                        dd_p->shift = 2;
                    }
                    else
                        dd_p->shift = 0;
                }
                /*
                 * not set in config so calculate default for non-cameralink
                 */
                else
                {
                    dd_p->shift = 16 - dd_p->extdepth;
                    dd_p->shift |= PDV_AIA_SWAP;
                }

                /*
                 * since shift was not set, check mask as well to see if it
                 * appears not to have been set either (0xffff) and set it too
                 */
                if (dd_p->mask == 0xffff)
                {
                    dd_p->mask = (u_int) (0x0000ffff >> (16 - tmpdepth));
                    if (pdv_is_dvc(edt_p))
                        edt_msg(DEBUG1, "auto-setting mask for dvc\n");
                    else
                        edt_msg(DEBUG1, "auto-set shift/mask to %02x/%02x (AIA/swap)\n", dd_p->shift, dd_p->mask);
                }
                else
                    edt_msg(DEBUG1, "auto-set shift to %02x (AIA/swap)\n", dd_p->shift);
            }

            edt_msg(DEBUG2, "PDV_SHIFT %x\n", dd_p->shift);
            dep_wait(edt_p);
            edt_reg_write(edt_p, PDV_SHIFT, dd_p->shift);
            edt_msg(DEBUG2, "PDV_MASK %x\n", dd_p->mask);
            dep_wait(edt_p);
            edt_reg_write(edt_p, PDV_MASK, dd_p->mask);
        }
#if 0
        edt_reg_write(edt_p, PDV_LINERATE, dd_p->linerate);
        /* Note dd_p->prin has been retired from dependent struct */
        edt_reg_write(edt_p, PDV_PRIN, dd_p->prin);
#endif
        if (dd_p->photo_trig)
            util2 |= PDV_PHOTO_TRIGGER;
        if (dd_p->fieldid_trig)
            util2 |= PDV_FLDID_TRIGGER;
        if (dd_p->acquire_mult)
            util2 |= PDV_AQUIRE_MULTIPLE;

        /*
         * RS-232 bit -- overloaded on MC4, only applicable to PCI
         * DVA or 3v RCI (LVDS or RS422)
         */
        if ((dd_p->serial_mode == PDV_SERIAL_RS232)
         && ((edt_p->devid == PDVA_ID) || (edt_p->devid == PDVFOI_ID) || (edt_is_dvfox(edt_p))))
            util2 |= PDV_RX232;

        else if (dd_p->sel_mc4)
            util2 |= PDV_SEL_MC4;

        /*
         * mc4 is EXPEXSYNC on camera link, so do it whether or not (the nearly obsolete)
         * SEL_MC4 is specified
         */
        if (dd_p->mc4) /* alias EXPEXSYNC on pcidv c-link */
            util2 |= PDV_MC4;

#if 0
        if (dd_p->sim_enable)
            util2 |= PDV_SIMEN;
        if (dd_p->xilinx_clk)
            util2 |= PDV_XOSCSEL;
        if (dd_p->linerate)
            util2 |= PDV_LINESCAN;
#endif

        if (dd_p->dbl_trig)
            util2 |= PDV_DBL_TRIG;
        if (dd_p->pulnix)
            util2 |= PDV_PULNIX;


        dd_p->util2 = util2;
        edt_msg(DEBUG2, "PDV_UTIL2 %x\n", util2);
        dep_wait(edt_p);
        edt_reg_write(edt_p, PDV_UTIL2, util2);
    }

    if (dd_p->byteswap == NOT_SET)
    {
        if (edt_little_endian())
            dd_p->byteswap = 0;
        else
            dd_p->byteswap = 1;
    }

    /* set Byteswap/ Hwpad */
    {
        int     padword = 0;

        padword = dd_p->hwpad << 1;

        if (dd_p->byteswap)
            padword |= PDV_BSWAP;
        if (dd_p->shortswap)
            padword |= PDV_SSWAP;
        if (dd_p->disable_mdout)
            padword |= PDV_DISABLEMD;
        if (dd_p->gendata)
            padword |= PDV_GENDATA;
        if (dd_p->skip)
            padword |= PDV_SKIP;

        edt_msg(DEBUG2, "PAD_SWAP %x\n", padword);
        dep_wait(edt_p);
        edt_reg_write(edt_p, PDV_BYTESWAP, padword);
    }


    /* xybion only (for now) uses fixedlen */
    if (dd_p->fixedlen)
    {
        /* #define SWAPEM 1 */
#if SWAPEM
        unsigned short val = dd_p->fixedlen;
        unsigned short tmp = ((val & 0xff) << 8) | ((val & 0xff00) >> 8);

        edt_msg(DEBUG2, "FIXEDLEN %x\n", tmp);
        dep_wait(edt_p);
        edt_reg_write(edt_p, PDV_FIXEDLEN, tmp);
#else

        edt_msg(DEBUG2, "FIXEDLEN %x\n", dd_p->fixedlen);
        dep_wait(edt_p);
        edt_reg_write(edt_p, PDV_FIXEDLEN, dd_p->fixedlen);
#endif
    }


    edt_msg(DEBUG2, "MODE_CNTL %x\n", dd_p->mode_cntl_norm);
    dep_wait(edt_p);
    edt_reg_write(edt_p, PDV_MODE_CNTL, dd_p->mode_cntl_norm);
    dep_wait(edt_p);


    if (edt_p->devid == PDVFOI_ID)
    {
        if (strlen(dd_p->foi_init) > 0)
        {
            edt_msg(DEBUG1, "sending foi init commands....");
            send_foi_commands(edt_p, dd_p->foi_init);
        }
    }
    else
        edt_reset_serial(edt_p);

    /* set waitc */
    if (dd_p->serial_waitc == NOT_SET)
        pdv_set_waitchar(edt_p, 0, 0);
    else
        pdv_set_waitchar(edt_p, 1, (u_char)dd_p->serial_waitc);

    if (dd_p->user_timeout == NOT_SET && edt_p->devid != PDVFOI_ID)
    {
        dd_p->user_timeout = 0; /* user_set will be the real flag */
        pdv_auto_set_timeout(edt_p);
    }
    else
        pdv_set_timeout(edt_p, dd_p->user_timeout);

    if (dd_p->timeout != NOT_SET)
        edt_set_rtimeout(edt_p, dd_p->timeout);

    pdv_set_defaults(edt_p);
    check_camera_values(edt_p, dd_p);

    do_xregwrites(edt_p, dd_p);

    /*
     * final stuff (none applicable to CL2 sim) 
     */
    if (!(edt_is_dvcl2(edt_p) && dd_p->sim_enable))
    {
        check_terminator(dd_p->serial_term);

        if ((dd_p->camera_shutter_timing == SPECINST_SERIAL)
            || (dd_p->camera_shutter_speed == SPECINST_SERIAL)
            || (dd_p->camera_download == SPECINST_SERIAL))
            dd_p->force_single = 1;

        if (dd_p->camera_download == SPECINST_SERIAL)
        {
            if ((DD_P_CAMERA_DOWNLOAD_FILE[0])
                && ((ret = specinst_download(edt_p, DD_P_CAMERA_DOWNLOAD_FILE)) == 0))
                if (DD_P_CAMERA_COMMAND_FILE[0])
                    ret = specinst_setparams(edt_p, DD_P_CAMERA_COMMAND_FILE);
            if (ret != 0)
                return ret;
        }

        if (strlen(dd_p->serial_init) > 0)
            serial_init(edt_p, dd_p);

        if (strlen(dd_p->xilinx_init) > 0)
            send_xilinx_commands(edt_p, dd_p->xilinx_init);

        if (dd_p->frame_timing != 0)
            pdv_set_frame_period(edt_p, dd_p->frame_period, dd_p->frame_timing);

        if (p_edtinfo->startdma != NOT_SET)
            edt_startdma_action(edt_p, p_edtinfo->startdma);
        else
            edt_startdma_action(edt_p, EDT_ACT_ALWAYS);
        if (p_edtinfo->enddma != NOT_SET)
            edt_enddma_action(edt_p, p_edtinfo->enddma);
        if (p_edtinfo->flushdma != NOT_SET)
            edt_set_firstflush(edt_p, p_edtinfo->flushdma);
        else
            edt_set_firstflush(edt_p, EDT_ACT_ONCE);
    }


    return 0;
}



#ifdef _NT_
#define popen(cmd, mode) _popen(cmd, mode)
#define pclose(cmd) _pclose(cmd)
#define BITLOAD "bitload"
#else
#define BITLOAD "./bitload"
#endif

/* find id string, starting with "id:". If found return 1, else 0 */
int
findid(char *buf, char *idstr)
{
    if (strncmp(buf, "id:", 3) == 0)
    {
#if 0
        char   *dp = idstr;
        char   *p = strchr(buf, '"');
        char   *pp = strrchr(p, '"');

        for (; p != pp; p++)
            *dp++ = *p;
#endif
        return (sscanf(&buf[4], " \"%[^\"]\"", idstr));
    }
    return 0;
}

void
dir_from_path(char *dirstr, char *pathstr)
{
    char   *bsp = strrchr(pathstr, '\\');
    char   *fsp = strrchr(pathstr, '/');
    char   *sp;

    if (bsp > fsp)
        sp = bsp;
    else
        sp = fsp;

    if (sp != NULL)
    {
        strncpy(dirstr, pathstr, sp - pathstr);
        dirstr[sp - pathstr] = '\0';
    }
    else
        *dirstr = '\0';
}

/*
 * return 1 if async bitfile (from name); so that we set roictl
 * from pclock speed ONLY if async bitfile
 */
int
async_bitfile(EdtDev *edt_p)
{
    edt_bitpath  pathbuf;

    edt_get_bitpath(edt_p, pathbuf, sizeof(edt_bitpath)) ;
    if (pathbuf[0] && (strstr(pathbuf, "async") != NULL))
        return 1;
    return 0;
}

void
fname_from_path(char *fname, char *pathstr)
{
    char   *bsp = strrchr(pathstr, '\\');
    char   *fsp = strrchr(pathstr, '/');
    char   *sp;

    if (bsp > fsp)
        sp = bsp;
    else
        sp = fsp;

    if (sp == NULL)
        strcpy(fname, pathstr);
    else
        strcpy(fname, sp + 1);
}

/*
 * check serial_exe to see if it's  Kodak 'i' type, if found then flush the
 * serial with a TRM command, and get the idn. Then send serial init string,
 * one command at a time.
 */
int
serial_init(EdtDev * edt_p, Dependent * dd_p)
{
    int     ret;
    int     foi = 0;
    int     hamamatsu = 0;
    int     skip_init = 0;
    char    cmdstr[32];
    char    resp[257];

    edt_msg(DEBUG1, "sending serial init....\n");

    if (dd_p->serial_format == SERIAL_BINARY)
        return serial_init_binary(edt_p, dd_p);

    else if (dd_p->serial_format == SERIAL_BASLER_FRAMING)
        return serial_init_basler_binary(edt_p, dd_p);

    else if (dd_p->serial_format == SERIAL_DUNCAN_FRAMING)
        return serial_init_duncan_binary(edt_p, dd_p);

    if (edt_p->devid == PDVFOI_ID)
        foi = 1;

    if (grepit(dd_p->cameratype, "Hamamatsu") != NULL)
        hamamatsu = 1;

    /* first flush any pending/garbage serial */
    resp[0] = '\0';
    ret = pdv_serial_wait(edt_p, 500, 256);
    pdv_serial_read(edt_p, resp, 256);

    /*
     * Hamamatsu 4880-8X needs some space after power cycle and also comes
     * back before it's really done, so...
     */
    if (hamamatsu)
        propeller_sleep(5);

    edt_msg(DEBUG1, "sending serial init commands to camera....\n");

    /*
     * if kodak 'i' camera, send a couple of "TRM?"s just to flush out the
     * serial, and send the IDN string to get the camera firmware ID
     */
    if (pdv_is_kodak_i(edt_p))
    {
        /* first send a couple of TRM?s to flush and sync */
        pdv_serial_command(edt_p, "TRM?");
        pdv_serial_wait(edt_p, 500, 40);
        pdv_serial_command(edt_p, "TRM?");
        pdv_serial_wait(edt_p, 500, 40);
        ret = pdv_serial_read(edt_p, resp, 256);

        pdv_serial_command(edt_p, "IDN?");
        edt_msg(DEBUG1, "IDN? ");
        pdv_serial_wait(edt_p, 1000, 60);
        ret = pdv_serial_read(edt_p, resp, 256);
        if (ret > 20)
            edt_msg(DEBUG1, "%s\n", resp);
        else if (ret > 0)
            edt_msg(DEBUG1, "%s (unexpected response!)\n", resp);
        else
        {
            edt_msg(DEBUG1, "<no response from camera -- check cables and connections>\n");
            skip_init = 1;
        }
    }


    if (!skip_init)
    {
        int    i = 0, just_dots = 1, ms;
        char   *lastp = NULL;
        char   *p = dd_p->serial_init;

        if (dd_p->serial_init_delay == NOT_SET)
            ms = 500;
        else ms = dd_p->serial_init_delay;

        /*
         * send serial init string
         */
        cmdstr[0] = '\0';
        while (*p)
        {
            if (i > 31)
            {
                edt_msg(EDT_MSG_FATAL, "ERROR: serial command too long\n");
                return -1;
            }
            if (*p == ':' && lastp && *lastp != '\\')
            {
                cmdstr[i] = '\0';
                i = 0;

                memset(resp, '\0', 257);