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PCI GS Main Board
PCIe8 LX Main Board

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SRXL2 Mezzanine

Data sheet / Specifications
SRXL Users Guide
Main Board Users Guide

Drivers and Software
Related documentation

Programmable L-Band and IF Radio Receiver

PRELIMINARY

The SRXL2 is in the final stages of development, and data on this page (and the associated data sheet) is still subject to change.

Features

• Provides Software-Defined Radio directly into a PCI Express board
• Simultaneous operation of complete L-Band and IF analog mixers
• Programmable L-Band local oscillator at 500 KHz tuning resolution for frequencies of 850-2350 MHz
• 115 MHz of bandwidth on L-band channel
• 70 MHz bandwidth on 140 and 160 MHz IFs
• 40 MHz bandwidth on 70 MHz IF
• Selectable direct sampling path for IF input with 70 MHz low pass filter
• 12-bit analog-to-digital conversion of L-band and IF bandpass-filtered data (250 MHz sample rate)
• Programmable sample clock 10-250 MHz
• Onboard TCXO 10 MHz reference clock or optional external reference input
• User-programmable Xilinx Virtex 4 SX XC4VSX55 FPGA
• Four GC4016 Graychips for up to 16 channels of digital down-conversion
• Connects to EDT PCI GS or PCIe8 LX main boards

Applications

• Satellite receiver, flexible data formats
• Test and measurement equipment
• Surveillance and spectrum monitoring

Description

The SRXL2 mezannine board provides software defined radio in a PCI or PCI Express platform. The board is designed to mount on the EDT PCI GS or PCIe8 LX main board, and accepts simultaneous RF inputs in the L-Band range of 800-2400 MHz and the IFs of 70, 140, or 160 MHz. The IF input also has a selectable direct sampling path. Each RF input is processed with an analog mixer. The mixer outputs are bandpass-filtered and digitized with 12-bit precision at a fixed sample rate of 250 MHz.

The resulting two channels of digital sample data are available as inputs to the Xilinx Virtex 4 FPGA. The Virtex 4 is user-programmable to perform signal processing or serve as a configurable switch matrix to route data to the main board and up to four four-channel GC4016 digital down-converter Graychips.

Additional user-configurable processing can be performed on the PCI GS or PCIe8 LX main board user interface FPGA. The GS main board provides a flexible high-performance 32-bit 66 MHz PCI DMA interface to the host computer memory and applications. The LX main board provides an 8-bit PCI Express interface.

The SRXL2 is similar to the SRXL with the following differences:

• Supported by the PCI GS and PCIe8 LX main boards but not the PCI SS
• Sampling the RF inputs at a higher sampling frequency (250 MHz instead of 65)
• Higher sampling frequency allows digitization of larger chunk of bandwidth
• Much larger FPGA, better suited towards DSP applications
• 8 more channels of digital down-conversion
• Provides GPS time code input for time-stamping data

Requirements

A PCI GS or PCIe8 LX main board and a computer with Intel, AMD or SPARC processor, 66Mhz or faster PCI bus when used with the PCI GS main board, or 8- or 16-Lane PCI Express when used with the PCIe8 LX. Will work in a 33Mhz PCI slot but max data throughput will be limited [more about bandwidth requirements].