Related Links

PCI GS Main Board
PCI SS Main Board
PCIe8 LX Main Board

More Telemetry/Telecom

HRC Mezzanine

Data sheet / Specifications

Drivers and Software
Documentation

PCIBus High Rate Communication Interface

Features

• Up to four 139.264 Mbit/s E4 or 155.52 Mbit/s serial interfaces useful for OC-3, STS-3 and STM-1
• Each interface may be configured as a unidirectional CMI-coded G.703 BNC, or a bidirectional 1310nm single-mode SSF (small form factor) LC fiber optic
• RAM options- 0 to 8 MBytes
• FPGA options- Xilinx XCV600E, 1000E, or 2000E
• High speed DMA channel between interfaces and PCI Local Bus computer
• Compatible with PCI platforms running Solaris, Windows, Linux, MacOS, and VxWorks

Applications

• Telecomm network monitoring
• Satellite data acquisition

Description

The HRC is a mezzanine board for the PCI SS, PCI GS, or PCIe8 LX main board, and supports STM-1, STS-3, OC-3 and E4 telecom standards in various combinations depending on the options. The boards have four connector locations, and each location can be either a 75 Ohm BNC coax interface with CMI coded transmission or a LC fiber optic connector. The fiber optic connector is a single-mode 1310nm transceiver. The coax connectors can be set as either as input or output by programmable control. The ordering options then select which connector slot is filled with fiber optic connector or coax connector. Notice that if bi-directional coax operation is required, a maximum two channels will be usable.

EDT provides an FPGA configuration file that acquires raw data.